pb.xpn

VHDL实例,适合大家学习使用

// PART:	ispLSI1032E-70LJ84
// FORMAT:	PINNAME	PINTYPE	LOCK	PULLUP	SLOWSLEW	OPENDRAIN	OUTDELAY	VOLTAGE	[CRITICAL]
		CLK	IN	-	1	-1	-1	-1	-1	0
		CLR	IN	-	1	-1	-1	-1	-1	0
		KEY	IN	-	1	-1	-1	-1	-1	0
		SEG1	OUT	-	1	0	-1	-1	-1	0
		SEG2	OUT	-	1	0	-1	-1	-1	0
		SEG3	OUT	-	1	0	-1	-1	-1	0
		SEG4	OUT	-	1	0	-1	-1	-1	0
		SEG5	OUT	-	1	0	-1	-1	-1	0
		SEG6	OUT	-	1	0	-1	-1	-1	0
		SEG7	OUT	-	1	0	-1	-1	-1	0
		SEG8	OUT	-	1	0	-1	-1	-1	0
		a	OUT	-	1	0	-1	-1	-1	0
		b	OUT	-	1	0	-1	-1	-1	0
		c	OUT	-	1	0	-1	-1	-1	0
		d	OUT	-	1	0	-1	-1	-1	0
		dt	OUT	-	1	0	-1	-1	-1	0
		e	OUT	-	1	0	-1	-1	-1	0
		f	OUT	-	1	0	-1	-1	-1	0
		g	OUT	-	1	0	-1	-1	-1	0