oc8051_top.srs

8051 IP核VERILOG代码

#
#
#
# Created by Synplify Verilog HDL Compiler version 7.0.0, Build 078R from Synplicity, Inc.
# Copyright 1994-1999 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Tue Feb 12 22:48:24 2002
#
#
#OPTIONS:"|-top|oc8051_fpga_top|-ram|-primux|-fixsmult|-infer_seqShift|-ID:\\SYNPLICITY\\SYNPLIFY_70\\lib|-autosm|-fid2|-sharing|on|-encrypt|-ui"
#CUR:"D:\\SYNPLICITY\\SYNPLIFY_70\\BIN\\C_VER.EXE":997294166l
#CUR:"D:\\verilog\\oc8051\\disp.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_acc.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_alu.v":996962422l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_alu_src1_sel.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_alu_src2_sel.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_alu_src3_sel.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_comp.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_cy_select.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_decoder.v":1013116702l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_rom.v":1013550478l
#CUR:"D:\\verilog\\oc8051\\oc8051_dptr.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_ext_addr_sel.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_fpga_top.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_immediate_sel.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_indi_addr.v":1012911580l
#CUR:"D:\\verilog\\oc8051\\oc8051_op_select.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_pc.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_port_out.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_psw.v":996961424l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_ram_rd_sel.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_ram.v":1013514174l
#CUR:"D:\\verilog\\oc8051\\oc8051_ram_sel.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_ram_top.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_ram_wr_sel.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg1.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg2.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg3.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg4.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg5.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_reg8.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_rom_addr_sel.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_sp.v":1013004250l
#CUR:"D:\\verilog\\oc8051\\oc8051_defines.v":1013003176l
#CUR:"D:\\verilog\\oc8051\\oc8051_timescale.v":996961426l
#CUR:"D:\\verilog\\oc8051\\oc8051_top.v":996961426l
f "D:\verilog\oc8051\disp.v"; # file 0
f "D:\verilog\oc8051\oc8051_acc.v"; # file 1
f "D:\verilog\oc8051\oc8051_defines.v"; # file 2
f "D:\verilog\oc8051\oc8051_alu.v"; # file 3
f "D:\verilog\oc8051\oc8051_defines.v"; # file 4
f "D:\verilog\oc8051\oc8051_alu_src1_sel.v"; # file 5
f "D:\verilog\oc8051\oc8051_defines.v"; # file 6
f "D:\verilog\oc8051\oc8051_alu_src2_sel.v"; # file 7
f "D:\verilog\oc8051\oc8051_defines.v"; # file 8
f "D:\verilog\oc8051\oc8051_alu_src3_sel.v"; # file 9
f "D:\verilog\oc8051\oc8051_comp.v"; # file 10
f "D:\verilog\oc8051\oc8051_defines.v"; # file 11
f "D:\verilog\oc8051\oc8051_cy_select.v"; # file 12
f "D:\verilog\oc8051\oc8051_defines.v"; # file 13
f "D:\verilog\oc8051\oc8051_decoder.v"; # file 14
f "D:\verilog\oc8051\oc8051_defines.v"; # file 15
f "D:\verilog\oc8051\oc8051_defines.v"; # file 16
f "D:\verilog\oc8051\oc8051_rom.v"; # file 17
f "D:\verilog\oc8051\oc8051_dptr.v"; # file 18
f "D:\verilog\oc8051\oc8051_defines.v"; # file 19
f "D:\verilog\oc8051\oc8051_ext_addr_sel.v"; # file 20
f "D:\verilog\oc8051\oc8051_defines.v"; # file 21
f "D:\verilog\oc8051\oc8051_fpga_top.v"; # file 22
f "D:\verilog\oc8051\oc8051_immediate_sel.v"; # file 23
f "D:\verilog\oc8051\oc8051_defines.v"; # file 24
f "D:\verilog\oc8051\oc8051_indi_addr.v"; # file 25
f "D:\verilog\oc8051\oc8051_op_select.v"; # file 26
f "D:\verilog\oc8051\oc8051_defines.v"; # file 27
f "D:\verilog\oc8051\oc8051_pc.v"; # file 28
f "D:\verilog\oc8051\oc8051_defines.v"; # file 29
f "D:\verilog\oc8051\oc8051_port_out.v"; # file 30
f "D:\verilog\oc8051\oc8051_defines.v"; # file 31
f "D:\verilog\oc8051\oc8051_psw.v"; # file 32
f "D:\verilog\oc8051\oc8051_defines.v"; # file 33
f "D:\verilog\oc8051\oc8051_ram_rd_sel.v"; # file 34
f "D:\verilog\oc8051\oc8051_defines.v"; # file 35
f "D:\verilog\oc8051\oc8051_ram.v"; # file 36
f "D:\verilog\oc8051\oc8051_ram_sel.v"; # file 37
f "D:\verilog\oc8051\oc8051_defines.v"; # file 38
f "D:\verilog\oc8051\oc8051_ram_top.v"; # file 39
f "D:\verilog\oc8051\oc8051_defines.v"; # file 40
f "D:\verilog\oc8051\oc8051_ram_wr_sel.v"; # file 41
f "D:\verilog\oc8051\oc8051_defines.v"; # file 42
f "D:\verilog\oc8051\oc8051_reg1.v"; # file 43
f "D:\verilog\oc8051\oc8051_reg2.v"; # file 44
f "D:\verilog\oc8051\oc8051_reg3.v"; # file 45
f "D:\verilog\oc8051\oc8051_reg4.v"; # file 46
f "D:\verilog\oc8051\oc8051_reg5.v"; # file 47
f "D:\verilog\oc8051\oc8051_reg8.v"; # file 48
f "D:\verilog\oc8051\oc8051_rom_addr_sel.v"; # file 49
f "D:\verilog\oc8051\oc8051_sp.v"; # file 50
f "D:\verilog\oc8051\oc8051_defines.v"; # file 51
f "D:\verilog\oc8051\oc8051_timescale.v"; # file 52
f "D:\verilog\oc8051\oc8051_top.v"; # file 53
@E@MR@:cU6(4:::644I(RFRs	FjOU6s4_CRoUPHCsD;Fo
RNP3PH#CDsHF4oR;P
NRs3FHNohl"CRFjOU6s4_C"oU;



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@HR@:cU6..:(.:6:R.gsR#0s;#0
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@FR@:cU64d:dd:6:R46Frk0(9:jR0Fkrj(:9b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@U@c::6njn:6:86RVRVsFrk0(9:jR0Fkrj(:9MRHrj(:9DRO	#Rs0y;
---------------------------------M-
Rc@@dd:6:6(:d(:4RsIF	ORFU4j6_osC4CRPsFHDoN;
PHR3#sPCHoDFR
4;N3PRFosHhCNlRO"FU4j6_osC4
";
@HR@:cd64c:jc:6:R4.ORD	O;D	
@HR@:cd64c:6c:6:R4(sR#0s;#0
@HR@:cd6nc:::6c(MRHR;HM
@FR@:cd6(6:::66gkRF0kRF0b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@d@c::6UjU:6:86RVRVsFRk0FRk0HOMRDs	R#
0;y--------------------------------
--M@R@c6c:.::(64.:(FRIsF	RO6Uj4C_soP.RCDsHF
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@HR@:cc6.d:.d:6:R.cORD	O;D	
@HR@:cc6.d:(d:6:R.gsR#0s;#0
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@FR@:cc64c:dc:6:R46Frk049:jR0Fkrj4:9b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@c@c::6(j(:6:86RVRVsFrk049:jR0Fkrj4:9MRHrj4:9DRO	#Rs0y;
---------------------------------M-
Rc@@6.:6:6(:.(:4RsIF	ORFU4j6_osCdCRPsFHDoN;
PHR3#sPCHoDFR
4;N3PRFosHhCNlRO"FU4j6_osCd
";
@HR@:c66.d:.d:6:R.cORD	O;D	
@HR@:c66.d:(d:6:R.gsR#0s;#0
@HR@:c664d:.d:6:R4dH.Mr:Rj9H.Mr:;j9
@FR@:c664c:dc:6:R46Frk0.9:jR0Fkrj.:9b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@6@c::6(j(:6:86RVRVsFrk0.9:jR0Fkrj.:9MRHrj.:9DRO	#Rs0y;
---------------------------------M-
Rc@@(4:6:6(:4(:4RsIF	ORFU4j6_osC6CRPsFHDoN;
PHR3#sPCHoDFR
4;N3PRFosHhCNlRO"FU4j6_osC6
";
@HR@:c(6..:..:6:R.cORD	O;D	
@HR@:c(6..:(.:6:R.gsR#0s;#0
@HR@:c(64.:..:6:R4dHcMr:Rj9HcMr:;j9
@FR@:c(64d:dd:6:R46Frk0c9:jR0Fkrjc:9b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
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b@(@c::6njn:6:86RVRVsFrk0c9:jR0Fkrjc:9MRHrjc:9DRO	#Rs0y;
---------------------------------M-
Rc@@n4:6:6(:4(:4RsIF	ORFU4j6_osCcCRPsFHDoN;
PHR3#sPCHoDFR
4;N3PRFosHhCNlRO"FU4j6_osCc
";
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@FR@:cn64d:dd:6:R46Frk0d9:jR0Fkrjd:9b;
Rj@@:44::.4:Rk0sCsR0k0CRs;kC
@bR@4j::44::V.RNCD#RDVN#VCRNCD#;R
b@n@c::6njn:6:86RVRVsFrk0d9:jR0Fkrjd:9MRHrjd:9DRO	#Rs0y;
---------------------------------M-
R.@@U6:6:6(:66:4RsIF	ORFU4j6_RbOPHCsD;Fo
RNP3PH#CDsHF4oR;P
NRs3FHNohl"CRFjOU6b4_O
";
@HR@:.U(n6:::(6U#Rs0#Rs0
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R.@@U6:(:(n:6R:UHRMPk_M4sR#0k_M4sR#0s;#0