mulppgenuns.vhd

VHDL的基本数学运算库,非常好用

-------------------------------------------------------------------------------
-- Title       : Partial-product generator for unsigned multiplier
-- Project     : VHDL Library of Arithmetic Units
-------------------------------------------------------------------------------
-- File        : MulPPGenUns.vhd
-- Author      : Reto Zimmermann  <[e-mail]>
-- Company     : Integrated Systems Laboratory, ETH Zurich
-- Date        : 1997/11/12
-------------------------------------------------------------------------------
-- Copyright (c) 1998 Integrated Systems Laboratory, ETH Zurich
-------------------------------------------------------------------------------
-- Description :
-- Partial-product generator for unsigned multiplier (Braun).
--
-- Partial products for 4x4-bit unsigned multiplication:
--
--      0         0         0         0  x(0)y(3)  x(0)y(2)  x(0)y(1)  x(0)y(0)
--      0         0         0  x(1)y(3)  x(1)y(2)  x(1)y(1)  x(1)y(0)         0
--      0         0  x(2)y(3)  x(2)y(2)  x(2)y(1)  x(2)y(0)         0         0
--      0  x(3)y(3)  x(3)y(2)  x(3)y(1)  x(3)y(0)         0         0         0
-------------------------------------------------------------------------------
--   p(7)      p(6)      p(5)      p(4)      p(3)      p(2)      p(1)      p(0)
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
library arith_lib;
use arith_lib.arith_lib.all;

-------------------------------------------------------------------------------

entity MulPPGenUns is

  generic (widthX : integer := 8;	-- word width of X
	   widthY : integer := 8);	-- word width of Y

  port (X : in std_logic_vector(widthX-1 downto 0);  -- multiplier
	Y : in std_logic_vector(widthY-1 downto 0);  -- multiplicand
						     -- partial products
        PP : out std_logic_vector(widthX*(widthX+widthY)-1 downto 0));

end MulPPGenUns;

-------------------------------------------------------------------------------

architecture Structural of MulPPGenUns is 

  constant widthP : integer := widthX+widthY;  -- width of single part. prod.

begin

  ppGen : process (X, Y)
    variable ppt : std_logic_vector(widthX*widthP-1 downto 0);
  begin

    -- defaults
    ppt := (others => '0');

    -- partial products x(i)y(k)
    for i in 0 to widthX-1 loop
      for k in 0 to widthY-1 loop
	ppt(i*widthP+i+k) := X(i) and Y(k);
      end loop;
    end loop;

    PP <= ppt;

  end process ppGen;

end Structural;

-------------------------------------------------------------------------------