whole.vhd

ov7620的CPLD采集程序

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;


entity whole is
port(
        mcu_adr,mcu_read,mcu_cs,mcu_clk,rst:            in    std_logic;
        mcu_data:                                       out    std_logic_vector(7 downto 0);
        cpld_ack,mcu_end:                               out   std_logic; 
        sram_cs,sram_read,sram_write:                   out   std_logic;
        sram_data:                                      inout std_logic_vector(7 downto 0);
        sram_adr:                                       out   std_logic_vector(17 downto 0);
        pclk,href,vsync,ov7620_clk:                     in    std_logic;
        ov7620_data:                                    in    std_logic_vector(7 downto 0)
            
     );
end whole;

-----------------------------------------------------------


architecture a of whole is
signal      Q:        std_logic_vector(4 downto 0);
signal    add_adr,sub_adr:     std_logic_vector(17 downto 0);
signal    write_start,write_end,pclk1,delay1,delay2,write_en,read_start,read_en:  std_logic;

begin

sram_cs<='0';


--------the enable signal of beginning writing data into sram ------

process(rst,vsync)
begin
       if rst='0' then
            write_start<='0';
            --read_start<='0';                                
       
       elsif vsync'event and  vsync='0' then
             if read_start='0' then
                write_start<='1';
             else
                write_start<='0';
             end if;
       end if;
end process;

--------the signal of stopping writing and beginning reading-------
process(rst,vsync,ov7620_clk)
begin
      if rst='0' then
             write_end<='0';
             read_start<='0';      
      elsif vsync'event and  vsync='1' then  
          if read_start='0' then   
             if write_start='1'  then
                 write_end<='1';
                 read_start<='1';          
             else 
                read_start<='0';
                write_end<='0';   
             end if;
          end if; 
      end if;
      cpld_ack<=read_start;       -----------------tell mcu to start to read data from sram
      
     if rising_edge(ov7620_clk) then     
          pclk1<=pclk; 
     end if;
       
end process;           


 
---------------the adress adder of ov7620---------------------
process(rst,pclk1) 
  begin
      if rst='0' then
          add_adr<=(others=>'0');
      elsif  pclk1'event and pclk1='0' then
          if write_start='1' and write_end='0' then
             if vsync='0' and href='1' then
                add_adr<=add_adr+1;
                
             end if;
          end if;
       end if;
end process;

----------------the adress subtracter of mcu-------------------------- 
process(write_start,delay2)
begin
      
       if write_start='1'and write_end='0' then
            sub_adr<=add_adr;
            mcu_end<='0';
       elsif delay2'event and delay2='1' then
          if sub_adr/="0000000000000000000" then  
            sub_adr<=sub_adr-1;
          else
            mcu_end<='1';
          end if;
       end if;
        
        
end process;
--------------------------------------------------------------------

process
begin
      if write_start='1' and write_end='0' then
          
           sram_adr<=add_adr;
      elsif read_start='1' then
           sram_adr<=sub_adr;
      else
           sram_adr<=(others=>'0');
      end if;
end process;
              
       
----------make the signal of write  enable -----------

process
begin  
    if rst='0' then
       sram_write<='1'; 
       write_en<='1';
       --mcu_end<='0';
    elsif write_start='1' and write_end='0'  then
           sram_write<=not pclk;
           write_en<= pclk;
           --mcu_end<='0';
    else
           sram_write<='1';
           write_en<='0';
           --mcu_end<=read_end;
    end if; 
   
end process;

-------make the signal of read enable --------

process 
  begin
      if  mcu_cs='0'and mcu_adr='1' then 
          sram_read<=mcu_read;
      else
          sram_read<='1';
                 
      end if;
end process;

process(mcu_clk,rst)
begin  
    if rst='0' then
       read_en<='0';
       delay1<='1';
       delay2<='1';
    elsif mcu_clk'event and mcu_clk='1' then
       delay2<=delay1;
       delay1<=mcu_cs;
       if mcu_cs='0' then 
           Q<=Q+1;
       elsif delay1='1' then
           Q<=(others=>'0');
       end if;
       if mcu_cs='0' then
          if Q>1 then
              read_en<='1';
               
          else
              read_en<='0';
           
          end if;
        else
          read_en<='0';
       end if;
   end if;
end process;


---------write data into sram---------------
process
begin     
     if write_start='1' and write_end='0' then
        if  write_en='1' then     
            sram_data<=ov7620_data;
        else 
            sram_data<=(others=>'Z');
        end if;
     else
        sram_data<=(others=>'Z');
     end if;        
end process;     
     
  

----------read data from sram----------------
process
begin  
   
   if read_en='1' then
        mcu_data<=sram_data;
   else 
        mcu_data<=(others=>'Z'); 
   end if;
end process;


------------counter-------------
--process(mcu_clk)
--begin
--    if mcu_clk'event and mcu_clk='1' then
        
--        delay3<=delay2;
  --      delay2<=delay1;
    --    delay1<=mcu_cs;
       -- if mcu_cs='0' then 
      --  Q<=Q+1;
      --  elsif delay1='1' then
        --  Q<=(others=>'0');
       -- end if;
    --end if;

--end process; 
           
   
end a;