patch-2.4.19-rmk-pxa-arm-rthal5

rtai-3.1-test3的源代码(Real-Time Application Interface )

+		hard_save_flags(flags);
+		if (flags & I_BIT) {
+			hard_sti();
+			BUG();
+		}
+
+		if (rthal.getflags() & I_BIT)
+			hard_cli();
+		rthal.copy_back(linux_i_bit, 0);
+	}
+}
+
+asmlinkage void rt_wrap_syscall_trace(int why, struct pt_regs *regs)
+{
+	unsigned long flags;
+	unsigned long i_bit = 0, linux_i_bit = 0;
+
+	if (rthal.do_IRQ != asm_do_IRQ) {
+		hard_save_flags(flags);
+		i_bit = flags & I_BIT;
+		linux_i_bit = rthal.getflags() & I_BIT;
+		if (i_bit) {
+			if (! linux_i_bit)
+				rthal.disint();
+			hard_sti();
+		} else if (linux_i_bit)
+			rthal.enint();
+	}
+	syscall_trace(why, regs);
+	if (rthal.do_IRQ != asm_do_IRQ) {
+		hard_save_flags(flags);
+		if (flags & I_BIT) {
+			hard_sti();
+			BUG();
+		}
+
+		if (rthal.getflags() & I_BIT)
+			hard_cli();
+		rthal.copy_back(linux_i_bit, 0);
+	}
+}
+
+asmlinkage int rt_wrap_do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
+{
+	unsigned long flags;
+	unsigned long i_bit = 0, linux_i_bit = 0;
+	int ret;
+
+	if (rthal.do_IRQ != asm_do_IRQ) {
+		hard_save_flags(flags);
+		i_bit = flags & I_BIT;
+		linux_i_bit = rthal.getflags() & I_BIT;
+		if (i_bit) {
+			if (! linux_i_bit)
+				rthal.disint();
+			hard_sti();
+		} else if (linux_i_bit)
+			rthal.enint();
+	}
+	ret = do_signal(oldset, regs, syscall);
+	if (rthal.do_IRQ != asm_do_IRQ) {
+		hard_save_flags(flags);
+		if (flags & I_BIT) {
+			hard_sti();
+			BUG();
+		}
+
+		if (rthal.getflags() & I_BIT)
+			hard_cli();
+		rthal.copy_back(linux_i_bit, 0);
+	}
+	return ret;
+}
+#endif
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/cpu-pxa.c linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/cpu-pxa.c
--- linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/cpu-pxa.c	Thu Sep 25 15:11:18 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/cpu-pxa.c	Wed Sep 10 17:40:23 2003
@@ -152,7 +152,11 @@ static void pxa_setspeed(unsigned int kh
 		printk(KERN_INFO "Changing CPU frequency to %d Mhz (PXbus=%dMhz).\n", 
 			khz/1000, freq_info->pxbus);
 
+#ifndef CONFIG_RTHAL
 	local_irq_save(flags);
+#else
+	hard_local_irq_save(flags);
+#endif
 	__asm__ __volatile__("\
 		ldr	r4, [%1]			@load MDREFR	\n\
 		b	2f						\n\
@@ -183,7 +187,11 @@ static void pxa_setspeed(unsigned int kh
 		: "=&r" (unused)
 		: "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart)
 		: "r4", "r5");
+#ifndef CONFIG_RTHAL
 	local_irq_restore(flags);
+#else
+	hard_local_irq_restore(flags);
+#endif
 }
 
 static int pxa_init_freqs( void)
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/generic.c linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/generic.c
--- linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/generic.c	Thu Sep 25 15:11:18 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/generic.c	Wed Sep 10 17:37:40 2003
@@ -108,14 +108,22 @@ void set_GPIO_mode(int gpio_mode)
 	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
 	int gafr;
 
+#ifndef CONFIG_RTHAL
 	local_irq_save(flags);
+#else
+	hard_local_irq_save(flags);
+#endif
 	if (gpio_mode & GPIO_MD_MASK_DIR)
 		GPDR(gpio) |= GPIO_bit(gpio);
 	else
 		GPDR(gpio) &= ~GPIO_bit(gpio);
 	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
 	GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
+#ifndef CONFIG_RTHAL
 	local_irq_restore(flags);
+#else
+	hard_local_irq_restore(flags);
+#endif
 }
 
 EXPORT_SYMBOL(set_GPIO_mode);
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/irq.c linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/irq.c
--- linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mach-pxa/irq.c	Thu Sep 25 15:11:18 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mach-pxa/irq.c	Fri Sep 26 16:04:44 2003
@@ -64,11 +64,13 @@
 static void pxa_mask_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_unmask_irq(unsigned int irq)
 {
 	ICMR |= (1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 0;
 }
 
 /*
@@ -79,11 +81,13 @@
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
 	GEDR0 = (1 << (irq - IRQ_GPIO0));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_mask_GPIO_0_1_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_unmask_GPIO_0_1_irq(unsigned int irq)
@@ -92,6 +96,7 @@
 	GRER0 = (GRER0 & ~(1 << gpio))|(GPIO_IRQ_rising_edge[0] & (1 << gpio));
 	GFER0 = (GFER0 & ~(1 << gpio))|(GPIO_IRQ_falling_edge[0] & (1 << gpio));
 	ICMR |= (1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 0;
 }
 
 /*
@@ -101,8 +106,10 @@
 static int GPIO_2_80_enabled[3];	/* enabled i.e. unmasked GPIO IRQs */
 static int GPIO_2_80_spurious[3];	/* GPIOs that triggered when masked */
 
-static void pxa_GPIO_2_80_demux(int irq, void *dev_id,
-				    struct pt_regs *regs)
+#ifndef CONFIG_RTHAL
+static
+#endif
+void pxa_GPIO_2_80_demux(int irq, void *dev_id, struct pt_regs *regs)
 {
 	int i, gedr, spurious;
 
@@ -127,8 +134,15 @@
 		}
 
 		for (i = 2; i < 32; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(2) + i - 2, regs);
+#else
+			if ((gedr = (GEDR0 & ~3)) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(2) + i - 2, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -144,8 +158,15 @@
 		}
 
 		for (i = 0; i < 32; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(32) + i, regs);
+#else
+			if ((gedr = GEDR1) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(32) + i, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -161,8 +182,15 @@
 		}
 
 		for (i = 0; i < 17; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(64) + i, regs);
+#else
+			if ((gedr = (GEDR2 & 0x0001ffff)) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(64) + i, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -184,9 +212,18 @@
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_2_80_spurious[index] &= ~mask;
 	GPIO_2_80_enabled[index] &= ~mask;
 	GEDR_x(index) = mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void pxa_mask_GPIO_2_80_irq(unsigned int irq)
@@ -194,8 +231,17 @@
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_2_80_spurious[index] &= ~mask;
 	GPIO_2_80_enabled[index] &= ~mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void pxa_unmask_GPIO_2_80_irq(unsigned int irq)
@@ -203,20 +249,35 @@
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	if (GPIO_2_80_spurious[index] & mask) {
 		/*
 		 * We don't want to miss an interrupt that would have occurred
 		 * while it was masked.  Simulate it if it is the case.
 		 */
 		int state = GPLR_x(index);
+//		printk(KERN_ERR"Emulating GPIO IRQ %d\n", irq);
 		if (((state & GPIO_IRQ_rising_edge[index]) |
 		     (~state & GPIO_IRQ_falling_edge[index])) & mask)
 		{
 			/* just in case it gets referenced: */
 			struct pt_regs dummy;
 
+#ifdef CONFIG_RTHAL
+			hard_restore_flags(flags);
+#endif
 			memzero(&dummy, sizeof(dummy));
-			do_IRQ(irq, &dummy);
+#ifndef CONFIG_RTHAL
+ 			do_IRQ(irq, &dummy);
+#else
+			hard_cli();
+			rthal.c_do_IRQ(irq, &dummy);
+			hard_restore_flags(flags);
+#endif
 
 			/* we are being called recursively from do_IRQ() */
 			return;
@@ -227,6 +288,10 @@
 		(GRER_x(index) & ~mask) | (GPIO_IRQ_rising_edge[index] & mask);
 	GFER_x(index) =
 		(GFER_x(index) & ~mask) | (GPIO_IRQ_falling_edge[index] & mask);
+	irq_desc[irq].masked = 0;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 
@@ -256,6 +321,7 @@
 		irq_desc[irq].mask_ack	= pxa_mask_irq;
 		irq_desc[irq].mask	= pxa_mask_irq;
 		irq_desc[irq].unmask	= pxa_unmask_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	/*
@@ -269,6 +335,7 @@
 		irq_desc[irq].mask_ack	= pxa_mask_and_ack_GPIO_0_1_irq;
 		irq_desc[irq].mask	= pxa_mask_GPIO_0_1_irq;
 		irq_desc[irq].unmask	= pxa_unmask_GPIO_0_1_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(80); irq++) {
@@ -277,6 +344,11 @@
 		irq_desc[irq].mask_ack	= pxa_mask_and_ack_GPIO_2_80_irq;
 		irq_desc[irq].mask	= pxa_mask_GPIO_2_80_irq;
 		irq_desc[irq].unmask	= pxa_unmask_GPIO_2_80_irq;
+		irq_desc[irq].masked	= 0;
 	}
 	setup_arm_irq( IRQ_GPIO_2_80, &GPIO_2_80_irqaction );
 }
+
+#ifdef CONFIG_RTHAL
+EXPORT_SYMBOL(pxa_GPIO_2_80_demux);
+#endif
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mm/ioremap.c linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mm/ioremap.c
--- linux-2.4.19-rmk7-pxa2.cvs/arch/arm/mm/ioremap.c	Wed Aug 20 14:11:27 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/mm/ioremap.c	Wed Sep 10 17:37:40 2003
@@ -107,6 +107,9 @@ remap_area_pages(unsigned long address, 
 		if (remap_area_pmd(pmd, address, end - address,
 					 pfn + (address >> PAGE_SHIFT), flags))
 			break;
+#ifdef CONFIG_RTHAL
+		set_pgdir(address, *dir);
+#endif
 		error = 0;
 		address = (address + PGDIR_SIZE) & PGDIR_MASK;
 		dir++;
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/arch/arm/nwfpe/fpa11.c linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/nwfpe/fpa11.c
--- linux-2.4.19-rmk7-pxa2.cvs/arch/arm/nwfpe/fpa11.c	Mon Aug  5 14:00:36 2002
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/arch/arm/nwfpe/fpa11.c	Thu Sep 25 16:59:37 2003
@@ -132,7 +132,15 @@ unsigned int EmulateAll(unsigned int opc
   unsigned int nRc = 0;
   unsigned long flags;
   FPA11 *fpa11; 
+#ifndef CONFIG_RTHAL
   save_flags(flags); sti();
+#else
+  unsigned long hflags;
+  hard_save_flags(hflags);
+  save_flags(flags);
+  hard_sti();
+  sti();
+#endif
 
   fpa11 = GET_FPA11();
 
@@ -169,6 +177,10 @@ unsigned int EmulateAll(unsigned int opc
     nRc = 0;
   }
 
+#ifdef CONFIG_RTHAL
+  hard_restore_flags(hflags);
+  if (flags & I_BIT)
+#endif
   restore_flags(flags);
 
   return(nRc);
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/include/asm-arm/arch-pxa/irq.h linux-2.4.19-rmk7-pxa2-rthal5.clean/include/asm-arm/arch-pxa/irq.h
--- linux-2.4.19-rmk7-pxa2.cvs/include/asm-arm/arch-pxa/irq.h	Thu Sep 25 15:11:19 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/include/asm-arm/arch-pxa/irq.h	Wed Sep 10 17:42:02 2003
@@ -17,3 +17,7 @@
  * Since it doesn't exist elsewhere, we'll put it here for now.
  */
 extern void do_IRQ(int irq, struct pt_regs *regs);
+#ifdef CONFIG_RTHAL
+extern void pxa_GPIO_2_80_demux(int irq, void *dev_id, struct pt_regs *regs);
+#endif
+
diff -urNp --exclude=CVS linux-2.4.19-rmk7-pxa2.cvs/include/asm-arm/arch-pxa/time.h linux-2.4.19-rmk7-pxa2-rthal5.clean/include/asm-arm/arch-pxa/time.h
--- linux-2.4.19-rmk7-pxa2.cvs/include/asm-arm/arch-pxa/time.h	Thu Sep 25 15:11:19 2003
+++ linux-2.4.19-rmk7-pxa2-rthal5.clean/include/asm-arm/arch-pxa/time.h	Wed Sep 10 17:42:12 2003
@@ -36,7 +36,11 @@ static unsigned long pxa_gettimeoffset (
 	unsigned long ticks_to_match, elapsed, usec;
 
 	/* Get ticks before next timer match */
+#ifndef CONFIG_RTHAL
 	ticks_to_match = OSMR0 - OSCR;