patch-2.4.21-sa11x0-pxa-fixed-rthal5

rtai-3.1-test3的源代码(Real-Time Application Interface )

--- linux-2.4.21-rmk1-pxa1/arch/arm/mach-pxa/generic.c	Thu Dec  4 17:15:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-pxa/generic.c	Thu Dec  4 17:17:08 2003
@@ -108,14 +108,22 @@ void set_GPIO_mode(int gpio_mode)
 	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
 	int gafr;
 
+#ifndef CONFIG_RTHAL
 	local_irq_save(flags);
+#else
+	hard_local_irq_save(flags);
+#endif
 	if (gpio_mode & GPIO_MD_MASK_DIR)
 		GPDR(gpio) |= GPIO_bit(gpio);
 	else
 		GPDR(gpio) &= ~GPIO_bit(gpio);
 	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
 	GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
+#ifndef CONFIG_RTHAL
 	local_irq_restore(flags);
+#else
+	hard_local_irq_restore(flags);
+#endif
 }
 
 EXPORT_SYMBOL(set_GPIO_mode);
diff -urNp linux-2.4.21-rmk1-pxa1/arch/arm/mach-pxa/irq.c linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-pxa/irq.c
--- linux-2.4.21-rmk1-pxa1/arch/arm/mach-pxa/irq.c	Thu Dec  4 17:15:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-pxa/irq.c	Thu Dec  4 17:17:08 2003
@@ -64,11 +64,13 @@ EXPORT_SYMBOL(set_GPIO_IRQ_edge);
 static void pxa_mask_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_unmask_irq(unsigned int irq)
 {
 	ICMR |= (1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 0;
 }
 
 /*
@@ -79,11 +81,13 @@ static void pxa_mask_and_ack_GPIO_0_1_ir
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
 	GEDR0 = (1 << (irq - IRQ_GPIO0));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_mask_GPIO_0_1_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 1;
 }
 
 static void pxa_unmask_GPIO_0_1_irq(unsigned int irq)
@@ -92,6 +96,7 @@ static void pxa_unmask_GPIO_0_1_irq(unsi
 	GRER0 = (GRER0 & ~(1 << gpio))|(GPIO_IRQ_rising_edge[0] & (1 << gpio));
 	GFER0 = (GFER0 & ~(1 << gpio))|(GPIO_IRQ_falling_edge[0] & (1 << gpio));
 	ICMR |= (1 << (irq + PXA_IRQ_SKIP));
+	irq_desc[irq].masked = 0;
 }
 
 /*
@@ -101,8 +106,10 @@ static void pxa_unmask_GPIO_0_1_irq(unsi
 static int GPIO_2_80_enabled[3];	/* enabled i.e. unmasked GPIO IRQs */
 static int GPIO_2_80_spurious[3];	/* GPIOs that triggered when masked */
 
-static void pxa_GPIO_2_80_demux(int irq, void *dev_id,
-				    struct pt_regs *regs)
+#ifndef CONFIG_RTHAL
+static
+#endif
+void pxa_GPIO_2_80_demux(int irq, void *dev_id, struct pt_regs *regs)
 {
 	int i, gedr, spurious;
 
@@ -127,8 +134,15 @@ static void pxa_GPIO_2_80_demux(int irq,
 		}
 
 		for (i = 2; i < 32; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(2) + i - 2, regs);
+#else
+			if ((gedr = (GEDR0 & ~3)) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(2) + i - 2, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -144,8 +158,15 @@ static void pxa_GPIO_2_80_demux(int irq,
 		}
 
 		for (i = 0; i < 32; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(32) + i, regs);
+#else
+			if ((gedr = GEDR1) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(32) + i, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -161,8 +182,15 @@ static void pxa_GPIO_2_80_demux(int irq,
 		}
 
 		for (i = 0; i < 17; ++i) {
+#ifndef CONFIG_RTHAL
 			if (gedr & (1<<i)) {
 				do_IRQ (IRQ_GPIO(64) + i, regs);
+#else
+			if ((gedr = (GEDR2 & 0x0001ffff)) & (1<<i)) {
+				pxa_unmask_irq(IRQ_GPIO_2_80);
+				rthal.c_do_IRQ(IRQ_GPIO(64) + i, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -184,9 +212,18 @@ static void pxa_mask_and_ack_GPIO_2_80_i
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_2_80_spurious[index] &= ~mask;
 	GPIO_2_80_enabled[index] &= ~mask;
 	GEDR_x(index) = mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void pxa_mask_GPIO_2_80_irq(unsigned int irq)
@@ -194,8 +231,17 @@ static void pxa_mask_GPIO_2_80_irq(unsig
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_2_80_spurious[index] &= ~mask;
 	GPIO_2_80_enabled[index] &= ~mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void pxa_unmask_GPIO_2_80_irq(unsigned int irq)
@@ -203,20 +249,35 @@ static void pxa_unmask_GPIO_2_80_irq(uns
 	int gpio_nr = IRQ_TO_GPIO_2_80(irq);
 	int mask = 1 << (gpio_nr & 0x1f);
 	int index = gpio_nr >> 5;
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	if (GPIO_2_80_spurious[index] & mask) {
 		/*
 		 * We don't want to miss an interrupt that would have occurred
 		 * while it was masked.  Simulate it if it is the case.
 		 */
 		int state = GPLR_x(index);
+//		printk(KERN_ERR"Emulating GPIO IRQ %d\n", irq);
 		if (((state & GPIO_IRQ_rising_edge[index]) |
 		     (~state & GPIO_IRQ_falling_edge[index])) & mask)
 		{
 			/* just in case it gets referenced: */
 			struct pt_regs dummy;
 
+#ifdef CONFIG_RTHAL
+			hard_restore_flags(flags);
+#endif
 			memzero(&dummy, sizeof(dummy));
-			do_IRQ(irq, &dummy);
+#ifndef CONFIG_RTHAL
+ 			do_IRQ(irq, &dummy);
+#else
+			hard_cli();
+			rthal.c_do_IRQ(irq, &dummy);
+			hard_restore_flags(flags);
+#endif
 
 			/* we are being called recursively from do_IRQ() */
 			return;
@@ -227,6 +288,10 @@ static void pxa_unmask_GPIO_2_80_irq(uns
 		(GRER_x(index) & ~mask) | (GPIO_IRQ_rising_edge[index] & mask);
 	GFER_x(index) =
 		(GFER_x(index) & ~mask) | (GPIO_IRQ_falling_edge[index] & mask);
+	irq_desc[irq].masked = 0;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 
@@ -256,6 +321,7 @@ void __init pxa_init_irq(void)
 		irq_desc[irq].mask_ack	= pxa_mask_irq;
 		irq_desc[irq].mask	= pxa_mask_irq;
 		irq_desc[irq].unmask	= pxa_unmask_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	/*
@@ -269,6 +335,7 @@ void __init pxa_init_irq(void)
 		irq_desc[irq].mask_ack	= pxa_mask_and_ack_GPIO_0_1_irq;
 		irq_desc[irq].mask	= pxa_mask_GPIO_0_1_irq;
 		irq_desc[irq].unmask	= pxa_unmask_GPIO_0_1_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(80); irq++) {
@@ -277,6 +344,11 @@ void __init pxa_init_irq(void)
 		irq_desc[irq].mask_ack	= pxa_mask_and_ack_GPIO_2_80_irq;
 		irq_desc[irq].mask	= pxa_mask_GPIO_2_80_irq;
 		irq_desc[irq].unmask	= pxa_unmask_GPIO_2_80_irq;
+		irq_desc[irq].masked	= 0;
 	}
 	setup_arm_irq( IRQ_GPIO_2_80, &GPIO_2_80_irqaction );
 }
+
+#ifdef CONFIG_RTHAL
+EXPORT_SYMBOL(pxa_GPIO_2_80_demux);
+#endif
diff -urNp linux-2.4.21-rmk1-pxa1/arch/arm/mach-sa1100/cpu-sa1110.c linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-sa1100/cpu-sa1110.c
--- linux-2.4.21-rmk1-pxa1/arch/arm/mach-sa1100/cpu-sa1110.c	Tue Oct  7 19:13:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-sa1100/cpu-sa1110.c	Thu Dec  4 17:17:08 2003
@@ -234,7 +234,11 @@ static void sa1110_setspeed(unsigned int
 	 * This means that we won't access SDRAM for the duration of
 	 * the programming.
 	 */
+#ifndef CONFIG_RTHAL
 	local_irq_save(flags);
+#else
+	hard_local_irq_save(flags);
+#endif
 	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
 	udelay(10);
 	__asm__ __volatile__("					\n\
@@ -255,7 +259,11 @@ static void sa1110_setspeed(unsigned int
 		: "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg),
 		  "r" (sd.mdrefr), "r" (sd.mdcas[0]),
 		  "r" (sd.mdcas[1]), "r" (sd.mdcas[2]), "r" (ppcr));
+#ifndef CONFIG_RTHAL
 	local_irq_restore(flags);
+#else
+	hard_local_irq_restore(flags);
+#endif
 
 	/*
 	 * Now, return the SDRAM refresh back to normal.
diff -urNp linux-2.4.21-rmk1-pxa1/arch/arm/mach-sa1100/irq.c linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-sa1100/irq.c
--- linux-2.4.21-rmk1-pxa1/arch/arm/mach-sa1100/irq.c	Tue Oct  7 19:13:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mach-sa1100/irq.c	Thu Dec  4 17:17:09 2003
@@ -34,7 +34,7 @@
  */
 static int GPIO_IRQ_rising_edge;
 static int GPIO_IRQ_falling_edge;
-static int GPIO_IRQ_mask = (1 << 11) - 1;
+static volatile int GPIO_IRQ_mask = (1 << 11) - 1;
 
 void set_GPIO_IRQ_edge(int gpio_mask, int edge)
 {
@@ -53,8 +53,8 @@ void set_GPIO_IRQ_edge(int gpio_mask, in
 		GPIO_IRQ_rising_edge &= ~gpio_mask;
 	GPDR &= ~gpio_mask;
 	GAFR &= ~gpio_mask;
-	GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
-	GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
+	GRER |= GPIO_IRQ_rising_edge & gpio_mask;
+	GFER |= GPIO_IRQ_falling_edge & gpio_mask;
 	while (gpio_mask) {
 		if (irq == 11)
 			irq = IRQ_GPIO11;
@@ -77,11 +77,13 @@ EXPORT_SYMBOL(set_GPIO_IRQ_edge);
 static void sa1100_mask_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << irq);
+	irq_desc[irq].masked = 1;
 }
 
 static void sa1100_unmask_irq(unsigned int irq)
 {
 	ICMR |= (1 << irq);
+	irq_desc[irq].masked = 0;
 }
 
 /*
@@ -94,25 +96,31 @@ static void sa1100_mask_and_ack_GPIO0_10
 
 	ICMR &= ~mask;
 	GEDR = mask;
+	irq_desc[irq].masked = 1;
 }
 
 static void sa1100_mask_GPIO0_10_irq(unsigned int irq)
 {
 	ICMR &= ~(1 << irq);
+	irq_desc[irq].masked = 1;
 }
 
 static void sa1100_unmask_GPIO0_10_irq(unsigned int irq)
 {
 	ICMR |= 1 << irq;
+	irq_desc[irq].masked = 0;
 }
 
 /*
  * Install handler for GPIO 11-27 edge detect interrupts
  */
 
-static int GPIO_11_27_spurious;		/* GPIOs that triggered when masked */
+static volatile int GPIO_11_27_spurious;		/* GPIOs that triggered when masked */
 
-static void sa1100_GPIO11_27_demux(int irq, void *dev_id,
+#ifndef CONFIG_RTHAL
+static 
+#endif
+void sa1100_GPIO11_27_demux(int irq, void *dev_id,
 				   struct pt_regs *regs)
 {
 	int i, spurious;
@@ -129,17 +137,25 @@ static void sa1100_GPIO11_27_demux(int i
 		 */
 		spurious = irq & ~GPIO_IRQ_mask;
 		if (spurious) {
+			unsigned long mask = ~(spurious & GPIO_11_27_spurious);
 			GEDR = spurious;
-			GRER &= ~(spurious & GPIO_11_27_spurious);
-			GFER &= ~(spurious & GPIO_11_27_spurious);
+			GRER &= mask;
+			GFER &= mask;
 			GPIO_11_27_spurious |= spurious;
 			irq ^= spurious;
 			if (!irq) continue;
 		}
 
 		for (i = 11; i <= 27; ++i) {
+#ifndef CONFIG_RTHAL
 			if (irq & (1<<i)) {
 				do_IRQ(IRQ_GPIO11 + i - 11, regs);
+#else
+			if ((irq = (GEDR & 0xfffff800)) & (1<<i)) {
+				sa1100_unmask_irq(11);
+				rthal.c_do_IRQ(IRQ_GPIO11 + i - 11, regs);
+				break;
+#endif
 			}
 		}
 	}
@@ -154,21 +170,44 @@ static struct irqaction GPIO11_27_irq = 
 static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq)
 {
 	unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_11_27_spurious &= ~mask;
 	GPIO_IRQ_mask &= ~mask;
 	GEDR = mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void sa1100_mask_GPIO11_27_irq(unsigned int irq)
 {
 	unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	GPIO_11_27_spurious &= ~mask;
 	GPIO_IRQ_mask &= ~mask;
+	irq_desc[irq].masked = 1;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static void sa1100_unmask_GPIO11_27_irq(unsigned int irq)
 {
 	unsigned int mask = (1 << GPIO_11_27_IRQ(irq));
+#ifdef CONFIG_RTHAL
+	unsigned long flags;
+
+	hard_save_flags_cli(flags);
+#endif
 	if (GPIO_11_27_spurious & mask) {
 		/*
 		 * We don't want to miss an interrupt that would have occurred
@@ -181,8 +220,17 @@ static void sa1100_unmask_GPIO11_27_irq(
 			/* just in case it gets referenced: */
 			struct pt_regs dummy;
 
+#ifdef CONFIG_RTHAL
+			hard_restore_flags(flags);
+#endif
 			memzero(&dummy, sizeof(dummy));
+#ifndef CONFIG_RTHAL
 			do_IRQ(irq, &dummy);
+#else
+			hard_cli();
+			rthal.c_do_IRQ(irq, &dummy);
+			hard_restore_flags(flags);
+#endif
 
 			/* we are being called recursively from do_IRQ() */
 			return;
@@ -191,8 +239,12 @@ static void sa1100_unmask_GPIO11_27_irq(
 
 	GPIO_IRQ_mask |= mask;
 
-	GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
-	GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
+	GRER |= (GPIO_IRQ_rising_edge & mask);
+	GFER |= (GPIO_IRQ_falling_edge & mask);
+	irq_desc[irq].masked = 0;
+#ifdef CONFIG_RTHAL
+	hard_restore_flags(flags);
+#endif
 }
 
 static struct resource irq_resource = {
@@ -235,6 +287,7 @@ void __init sa1100_init_irq(void)
 		irq_desc[irq].mask_ack	= sa1100_mask_and_ack_GPIO0_10_irq;
 		irq_desc[irq].mask	= sa1100_mask_GPIO0_10_irq;
 		irq_desc[irq].unmask	= sa1100_unmask_GPIO0_10_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	for (irq = 11; irq <= 31; irq++) {
@@ -243,6 +296,7 @@ void __init sa1100_init_irq(void)
 		irq_desc[irq].mask_ack	= sa1100_mask_irq;
 		irq_desc[irq].mask	= sa1100_mask_irq;
 		irq_desc[irq].unmask	= sa1100_unmask_irq;
+		irq_desc[irq].masked	= 0;
 	}
 
 	for (irq = 32; irq <= 48; irq++) {
@@ -251,6 +305,9 @@ void __init sa1100_init_irq(void)
 		irq_desc[irq].mask_ack	= sa1100_mask_and_ack_GPIO11_27_irq;
 		irq_desc[irq].mask	= sa1100_mask_GPIO11_27_irq;
 		irq_desc[irq].unmask	= sa1100_unmask_GPIO11_27_irq;
+		irq_desc[irq].masked	= 0;
 	}
 	setup_arm_irq( IRQ_GPIO11_27, &GPIO11_27_irq );
 }
+
+EXPORT_SYMBOL(sa1100_GPIO11_27_demux);
diff -urNp linux-2.4.21-rmk1-pxa1/arch/arm/mm/ioremap.c linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mm/ioremap.c
--- linux-2.4.21-rmk1-pxa1/arch/arm/mm/ioremap.c	Tue Oct  7 19:13:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mm/ioremap.c	Thu Dec  4 17:17:09 2003
@@ -107,6 +107,9 @@ remap_area_pages(unsigned long address, 
 		if (remap_area_pmd(pmd, address, end - address,
 					 pfn + (address >> PAGE_SHIFT), flags))
 			break;
+#ifdef CONFIG_RTHAL
+		set_pgdir(address, *dir);
+#endif
 		error = 0;
 		address = (address + PGDIR_SIZE) & PGDIR_MASK;
 		dir++;
diff -urNp linux-2.4.21-rmk1-pxa1/arch/arm/mm/proc-sa110.S linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mm/proc-sa110.S
--- linux-2.4.21-rmk1-pxa1/arch/arm/mm/proc-sa110.S	Tue Oct  7 19:13:16 2003
+++ linux-2.4.21-rmk1-pxa1-rthal5/arch/arm/mm/proc-sa110.S	Thu Dec  4 17:17:09 2003
@@ -86,12 +86,12 @@ Lclean_switch:	.long	0
 	.align	5
 ENTRY(cpu_sa110_data_abort)
 ENTRY(cpu_sa1100_data_abort)
-	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
+	mrc	p15, 0, r1, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
-	ldr	r1, [r2]			@ read aborted instruction
-	and	r3, r3, #255
-	tst	r1, r1, lsr #21			@ C = bit 20
-	sbc	r1, r1, r1			@ r1 = C - 1