📄 rthal5g-2.4.22.patch
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drop_mmu_context(mm,cpu); }@@ -93,9 +109,10 @@ int size; #ifdef DEBUG_TLB- printk("[tlbrange<%02x,%08lx,%08lx>]",+ printk("[tlbrange<%02x,%08lx,%08lx>]\n", cpu_asid(cpu, mm), start, end); #endif+ local_irq_save(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; size = (size + 1) >> 1;@@ -127,7 +144,11 @@ } write_c0_entryhi(oldpid); } else {- drop_mmu_context(mm, cpu);+//#ifndef CONFIG_RTHAL + drop_mmu_context(mm, cpu);+//#else+// ___drop_mmu_context(mm, cpu);+//#endif } local_irq_restore(flags); }@@ -142,11 +163,12 @@ int oldpid, newpid, idx; #ifdef DEBUG_TLB- printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),+ printk("[tlbpage<%d,%08lx>]\n", cpu_context(cpu, vma->vm_mm), page); #endif newpid = cpu_asid(cpu, vma->vm_mm); page &= (PAGE_MASK << 1);+ local_irq_save(flags); oldpid = (read_c0_entryhi() & 0xff); write_c0_entryhi(page | newpid);@@ -191,11 +213,11 @@ pid = read_c0_entryhi() & ASID_MASK; #ifdef DEBUG_TLB- if ((pid != cpu_asid(cpu, vma->vm_mm)) ||- (cpu_context(vma->vm_mm) == 0)) {- printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "- "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);- }+// if ((pid != cpu_asid(cpu, vma->vm_mm)) ||+// (cpu_context(vma->vm_mm) == 0)) {+// printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "+// "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);+// } #endif local_irq_save(flags);diff -Nur -X dontdiff.dat linux-2.4.22.orig/Documentation/Configure.help linux-2.4.22/Documentation/Configure.help--- linux-2.4.22.orig/Documentation/Configure.help 2003-08-27 16:14:19.000000000 -0700+++ linux-2.4.22/Documentation/Configure.help 2003-08-26 07:24:53.000000000 -0700@@ -262,6 +262,13 @@ If you don't have this computer, you may safely say N. +Real-Time Harware Abstraction+CONFIG_RTHAL+ The Real-Time Hardware Abstraction Layer (RTHAL) is used by+ the Real-Time Application Interface (RTAI) to provide a+ hard real-time environment as part of Linux. This feature+ cannot be turned off, so say Y. + IO-APIC support on uniprocessors CONFIG_X86_UP_IOAPIC An IO-APIC (I/O Advanced Programmable Interrupt Controller) is andiff -Nur -X dontdiff.dat linux-2.4.22.orig/include/asm-mips/mmu_context.h linux-2.4.22/include/asm-mips/mmu_context.h--- linux-2.4.22.orig/include/asm-mips/mmu_context.h 2003-08-27 16:16:18.000000000 -0700+++ linux-2.4.22/include/asm-mips/mmu_context.h 2003-08-27 10:01:34.000000000 -0700@@ -15,6 +15,7 @@ #include <linux/slab.h> #include <asm/pgalloc.h> #include <asm/pgtable.h>+#include <asm/system.h> /* * For the fast tlb miss handlers, we currently keep a per cpu array@@ -92,7 +93,6 @@ unsigned long flags; local_irq_save(flags);- /* Check if our ASID is of an older version and thus invalid */ if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK) get_new_mmu_context(next, cpu);@@ -106,7 +106,6 @@ */ clear_bit(cpu, &prev->cpu_vm_mask); set_bit(cpu, &next->cpu_vm_mask);- local_irq_restore(flags); } @@ -128,9 +127,9 @@ unsigned long flags; int cpu = smp_processor_id(); - local_irq_save(flags);+ local_irq_save(flags); - /* Unconditionally get a new ASID. */+ /* Unconditionally get a new ASID. */ get_new_mmu_context(next, cpu); write_c0_entryhi(cpu_context(cpu, next));@@ -140,19 +139,40 @@ clear_bit(cpu, &prev->cpu_vm_mask); set_bit(cpu, &next->cpu_vm_mask); - local_irq_restore(flags);+ local_irq_restore(flags); } /* * If mm is currently active_mm, we can't really drop it. Instead, * we will get a new one for it. */++#ifdef CONFIG_RTHAL+static inline void ___drop_mmu_context(struct mm_struct *mm, unsigned cpu)+{+ if (test_bit(cpu, &mm->cpu_vm_mask)) + {+ get_new_mmu_context(mm, cpu);+ write_c0_entryhi(cpu_asid(cpu, mm));+ }+ else + { + cpu_context(cpu, mm) = 0;+ }+ +}+#endif+ static inline void drop_mmu_context(struct mm_struct *mm, unsigned cpu) { unsigned long flags; - local_irq_save(flags);+#ifndef CONFIG_RTHAL+ local_irq_save(flags);+#else+ hard_save_flags_and_cli(flags);+#endif if (test_bit(cpu, &mm->cpu_vm_mask)) { get_new_mmu_context(mm, cpu);@@ -162,7 +182,11 @@ cpu_context(cpu, mm) = 0; } - local_irq_restore(flags);+#ifndef CONFIG_RTHAL+ local_irq_restore(flags);+#else+ hard_restore_flags(flags);+#endif } #endif /* _ASM_MMU_CONTEXT_H */diff -Nur -X dontdiff.dat linux-2.4.22.orig/include/asm-mips/stackframe.h linux-2.4.22/include/asm-mips/stackframe.h--- linux-2.4.22.orig/include/asm-mips/stackframe.h 2003-08-27 16:16:18.000000000 -0700+++ linux-2.4.22/include/asm-mips/stackframe.h 2003-08-27 10:04:42.000000000 -0700@@ -62,7 +62,6 @@ lui k1, %hi(kernelsp); \ lw k1, %lo(kernelsp)(k1); #endif- #define SAVE_SOME \ .set push; \ .set reorder; \@@ -137,7 +136,6 @@ lw $30, PT_R30(sp) #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)- #define RESTORE_SOME \ .set push; \ .set reorder; \diff -Nur -X dontdiff.dat linux-2.4.22.orig/include/asm-mips/system.h linux-2.4.22/include/asm-mips/system.h--- linux-2.4.22.orig/include/asm-mips/system.h 2003-08-27 16:16:18.000000000 -0700+++ linux-2.4.22/include/asm-mips/system.h 2003-08-27 10:01:21.000000000 -0700@@ -12,6 +12,9 @@ * * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000 MIPS Technologies, Inc.+ * + * rthal modifications by: Steven Seeger (sseeger@stellartec.com) 16Apr03 (taxes done)+ * */ #ifndef _ASM_SYSTEM_H #define _ASM_SYSTEM_H@@ -25,7 +28,11 @@ #include <asm/ptrace.h> __asm__ (+#ifdef CONFIG_RTHAL + ".macro\t__hard_sti\n\t"+#else ".macro\t__sti\n\t"+#endif ".set\tpush\n\t" ".set\treorder\n\t" ".set\tnoat\n\t"@@ -37,10 +44,18 @@ ".endm"); extern __inline__ void-__sti(void)+#ifdef CONFIG_RTHAL+ hard_sti(void)+#else+ __sti(void)+#endif { __asm__ __volatile__(+#ifndef CONFIG_RTHAL "__sti"+#else+ "__hard_sti"+#endif : /* no outputs */ : /* no inputs */ : "memory");@@ -54,7 +69,11 @@ * no nops at all. */ __asm__ (+#ifdef CONFIG_RTHAL + ".macro\t__hard_cli\n\t"+#else ".macro\t__cli\n\t"+#endif ".set\tpush\n\t" ".set\tnoat\n\t" "mfc0\t$1,$12\n\t"@@ -69,15 +88,24 @@ ".endm"); extern __inline__ void-__cli(void)+#ifdef CONFIG_RTHAL+ hard_cli(void)+#else+ __cli(void)+#endif { __asm__ __volatile__(+#ifndef CONFIG_RTHAL "__cli"+#else+ "__hard_cli"+#endif : /* no outputs */ : /* no inputs */ : "memory"); } +#ifndef CONFIG_RTHAL __asm__ ( ".macro\t__save_flags flags\n\t" ".set\tpush\n\t"@@ -104,7 +132,7 @@ "sll\t$0, $0, 1\t\t\t# nop\n\t" "sll\t$0, $0, 1\t\t\t# nop\n\t" "sll\t$0, $0, 1\t\t\t# nop\n\t"- ".set\tpop\n\t"+ ".set\tpop\n\t" ".endm"); #define __save_and_cli(x) \@@ -114,26 +142,96 @@ : /* no inputs */ \ : "memory") -__asm__ (- ".macro\t__save_and_sti result\n\t"- ".set\tpush\n\t"- ".set\treorder\n\t"- ".set\tnoat\n\t"- "mfc0\t\\result, $12\n\t"- "ori\t$1, \\result, 1\n\t"- ".set\tnoreorder\n\t"- "mtc0\t$1, $12\n\t"- ".set\tpop\n\t"+__asm__ ( + ".macro\t__save_and_sti result\n\t" + ".set\tpush\n\t" + ".set\treorder\n\t" + ".set\tnoat\n\t" + "mfc0\t\\result, $12\n\t" + "ori\t$1, \\result, 1\n\t" + ".set\tnoreorder\n\t" + "mtc0\t$1,$12\n\t" + ".set\tpop\n\t" ".endm");+#else //!CONFIG_RTHAL++#define hard_save_flags(x) do { __hard_save_flags(&(x)); } while(0) +#define hard_save_flags_and_cli(x) do { __hard_save_flags_and_cli(&(x)); } while(0)++extern __inline__ void __hard_save_flags(unsigned long *x)+{+ __asm__ __volatile__(+ ".set\tpush\n\t"+ ".set\treorder\n\t"+ "mfc0\t%0,$12\n\t"+ ".set\tpop\n\t"+ : "=r" (*x));+}++extern __inline__ void __hard_save_flags_and_cli(unsigned long *x)+{+ __asm__ __volatile__(+ ".set\tpush\n\t"+ ".set\treorder\n\t"+ ".set\tnoat\n\t"+ "mfc0\t%0,$12\n\t"+ "ori\t$1,%0,1\n\t"+ "xori\t$1,1\n\t"+ ".set\tnoreorder\n\t"+ "mtc0\t$1,$12\n\t"+ "nop\n\t"+ "nop\n\t"+ "nop\n\t"+ ".set\tpop\n\t"+ : "=r" (*x)+ : /* no inputs */+ : "$1", "memory");+}++extern __inline__ void __hard_save_flags_and_sti(unsigned long *x)+{+ __asm__ __volatile__(+ ".set\tpush\n\t"+ ".set\treorder\n\t"+ ".set\tnoat\n\t"+ "mfc0\t%0,$12\n\t"+ "ori\t$1,%0,1\n\t"+ ".set\tnoreorder\n\t"+ "mtc0\t$1,$12\n\t"+ "nop\n\t"+ "nop\n\t"+ "nop\n\t"+ ".set\tpop\n\t"+ : "=r" (*x)+ : /* no inputs */+ : "$1", "memory");+}++#define hard_save_flags_and_sti(x) do { __hard_save_flags_and_sti(&(x)); } while(0) +#endif //CONFIG_RTHAL++#ifndef CONFIG_RTHAL #define __save_and_sti(x) \ __asm__ __volatile__( \ "__save_and_sti\t%0" \ : "=r" (x) \ : /* no inputs */ \ : "memory")+#else //!CONFIG_RTHAL+#define __hard_save_and_sti(x) \+ __asm__ __volatile__( \+ "__hard_save_flags_and_sti\t%0" \+ : "=r" (x) \+ : /* no inputs */ \+ : "memory")+#endif +#ifndef CONFIG_RTHAL __asm__(".macro\t__restore_flags flags\n\t"+#else+__asm__(".macro\t__hard_restore_flags flags\n\t"+#endif ".set\tnoreorder\n\t" ".set\tnoat\n\t" "mfc0\t$1, $12\n\t"@@ -149,44 +247,95 @@ ".set\treorder\n\t" ".endm"); -#define __restore_flags(flags) \+#ifdef CONFIG_RTHAL+#define hard_restore_flags(flags) \ do { \ unsigned long __tmp1; \ \ __asm__ __volatile__( \- "__restore_flags\t%0" \+ "__hard_restore_flags\t%0" \ : "=r" (__tmp1) \ : "0" (flags) \ : "memory"); \ } while(0)-+#else //CONFIG_RTHAL+#define __restore_flags(flags) \+do { \+ unsigned long __tmp1; \+ \+ __asm__ __volatile__( \+ "__restore_flags\t%0" \+ : "=r" (__tmp1) \+ : "0" (flags) \+ : "memory"); \+} while(0) +#endif //CONFIG_RTHAL+ #ifdef CONFIG_SMP +#ifdef CONFIG_RTHAL+#error No RTHAL support for SMP systems. Give Steve S. an SMP system and he+ will do it for you. :)+#endif //CONFIG_RTHAL+ extern void __global_sti(void); extern void __global_cli(void); extern unsigned long __global_save_flags(void); extern void __global_restore_flags(unsigned long); # define sti() __global_sti() # define cli() __global_cli()-# define save_flags(x) do { x = __global_save_flags(); } while (0)+# define save_flags(x) do{ x = __global_save_flags();} while (0) # define restore_flags(x) __global_restore_flags(x)-# define save_and_cli(x) do { save_flags(x); cli(); } while(0)-# define save_and_sti(x) do { save_flags(x); sti(); } while(0)+# define save_and_cli(x) do{ save_flags(x); cli();} while(0)+# define save_and_sti(x) do{ save_flags(x); sti();} while(0) #else /* Single processor */ -# define sti() __sti()-# define cli() __cli()-# define save_flags(x) __save_flags(x)-# define save_and_cli(x) __save_and_cli(x)-# define restore_flags(x) __restore_flags(x)-# define save_and_sti(x) __save_and_sti(x)+#ifdef CONFIG_RTHAL +/*+* Standard rthal defintions.+*/+struct rt_hal { + void *ret_from_intr; //0+ unsigned int (*mips_timer_interrupt)(int irq, struct pt_regs *regs); //4+ unsigned int (*mips_interrupt)(int irq, struct pt_regs *regs); //8+ long long (*rtai_srq_interrupt)(unsigned int srq, unsigned int args); //12+ void (*disint)(void); //16+ void (*enint)(void); //20+ unsigned int rtai_active; //24+ unsigned long (*getflags)(void); //28+ void (*setflags)(unsigned long flags); //32+ unsigned long (*getflags_and_cli)(void); //36+ void *irq_desc; //40+ union { unsigned long long tsc; unsigned long hltsc[2]; } tsc; //44+ void (*linux_mips_timer_intr)(int irq, void *dev_id, struct pt_regs *regs); //52+ void (*linux_soft_mips_timer_intr)(int irq, void *dev_id, struct pt_regs *regs); //56+ unsigned long (*getflags_and_sti)(void); //60+ void (*soft_enint)(void); //64+};+ +extern struct rt_hal rthal;++#define __sti() do { rthal.enint(); } while(0);+#define __cli() do { rthal.disint(); } while(0);+#define __save_flags(x) do { x = rthal.getflags(); } while(0);+#define __save_and_cli(x) do { x = rthal.getflags_and_cli(); } while(0);+#define __restore_flags(x) do { rthal.setflags(x); } while(0);+#define __save_and_sti(x) do { rthal.getflags_and_cli(); } while(0); ++#endif //CONFIG_RTHAL ++#define sti() __sti()+#define cli() __cli()+#define save_flags(x) __save_flags(x)+#define save_and_cli(x) __save_and_cli(x)+#define restore_flags(x) __restore_flags(x)+#define save_and_sti(x) __save_and_sti(x) #endif /* SMP */ /* For spinlocks etc */ #define local_irq_save(x) __save_and_cli(x)-#define local_irq_set(x) __save_and_sti(x) #define local_irq_restore(x) __restore_flags(x) #define local_irq_disable() __cli() #define local_irq_enable() __sti() ⌨️ 快捷键说明
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