mc8051_test.fit.qmsg

mc8051源码

{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources" {  } {  } 0 0 "DQS I/O pins require %1!d! global routing resources" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN 28 " "Info: Automatically promoted signal \"clk\" to use Global clock in PIN 28" {  } { { "mc8051_test.bdf" "" { Schematic "F:/quartusII_example/8051_test/8051_test/mc8051_test.bdf" { { 32 128 296 48 "clk" "" } { 216 34 72 232 "clk" "" } } } }  } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "reset Global clock " "Info: Automatically promoted some destinations of signal \"reset\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a0 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a0\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a1 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a1\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a2 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a2\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a3 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a3\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a4 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a4\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a5 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a5\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a6 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a6\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a7 " "Info: Destination \"mc8051_ram:inst2\|altsyncram:altsyncram_component\|altsyncram_31b1:auto_generated\|ram_block1a7\" may be non-global or may not use global clock" {  } { { "db/altsyncram_31b1.tdf" "" { Text "F:/quartusII_example/8051_test/8051_test/db/altsyncram_31b1.tdf" 33 2 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0}  } { { "mc8051_test.bdf" "" { Schematic "F:/quartusII_example/8051_test/8051_test/mc8051_test.bdf" { { 64 128 296 80 "reset" "" } } } }  } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_PIN_USES_INTERNAL_GLOBAL" "reset " "Info: Pin \"reset\" drives global clock, but is not placed in a dedicated clock pin position" {  } { { "c:/altera/72/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/72/quartus/bin/pin_planner.ppl" { reset } } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "reset" } } } } { "mc8051_test.bdf" "" { Schematic "F:/quartusII_example/8051_test/8051_test/mc8051_test.bdf" { { 64 128 296 80 "reset" "" } } } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { reset } "NODE_NAME" } }  } 0 0 "Pin \"%1!s!\" drives global clock, but is not placed in a dedicated clock pin position" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0}
{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Extra Info: Started Fast Input/Output/OE register processing" {  } {  } 1 0 "Started Fast Input/Output/OE register processing" 1 0 "" 0}