Logic Synthesis with Synopsys
资源简介:32bits FIFO with synchronizer. pass the Synthesis using Synopsys tools
上传时间: 2015-07-13
上传用户:zyt
资源简介:FPGA Synthesis with the Synplify Pro Tool
上传时间: 2013-09-04
上传用户:sevenbestfei
资源简介:FPGA Synthesis with the Synplify Pro Tool
上传时间: 2015-04-24
上传用户:guanliya
资源简介:Electronic design automation (EDA) company providing Logic Synthesis and analysis tools for FPGA and ASIC designers.
上传时间: 2014-01-09
上传用户:四只眼
资源简介:Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip Synthesis, physical Synthesis, formal verification and static timing an...
上传时间: 2017-04-04
上传用户:lanwei
资源简介:·Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physical Compiler and Primetime
上传时间: 2013-04-24
上传用户:alia
资源简介:人工智能中模糊逻辑算法 FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy Logic systems with multi-controller support. It supports all commonly used shape functions and hedges, with full support for the vario...
上传时间: 2013-12-16
上传用户:dbs012280
资源简介:电子书-RTL Design Style Guide for Verilog HDL540页A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1...
上传时间: 2022-03-21
上传用户:canderile
资源简介:FPGA Synthesis with the Synplify_Pro Tool
上传时间: 2013-10-28
上传用户:aa54
资源简介:FPGA Synthesis with the Synplify_Pro Tool
上传时间: 2014-11-04
上传用户:huyanju
资源简介:LemonSMS is a component developed in Java that provides a turnkey solution for application developers to incorporate into their Java applications the functionality of sending and processing of incoming SMS messages. LemonSMS acts as a mid...
上传时间: 2013-12-29
上传用户:大融融rr
资源简介:The "JTAG-GDB server" is a program for integrating the ARM-Embedded ICE Logic with the GNU-Debugger GDB.
上传时间: 2014-01-24
上传用户:LouieWu
资源简介:《Digital Logic And Microprocessor Design With VHDL》,CPU设计经典参考书
上传时间: 2013-11-28
上传用户:我干你啊
资源简介:一本很好的关于学习VHDL的书,Fundamentals of Digital Logic with VHDL Design,我的导师在教我VHDL时使用的教材.上传的是书内包含的所有的代码.
上传时间: 2016-01-27
上传用户:恋天使569
资源简介:UART RX with simple Logic flow to check the protocol correct or not. Important is that the Logic flow.
上传时间: 2016-04-21
上传用户:1159797854
资源简介:FUNDAMENTALS OF DIGITAL Logic WITH VERILOG DESIGN 将verilog和数电很好的结合在一起讲解
上传时间: 2016-08-20
上传用户:王庆才
资源简介:Document showing facial recognition with eigenfaces and fuzzy Logic together
上传时间: 2014-01-10
上传用户:chfanjiang
资源简介:The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, submicron ASIC designs. Si...
上传时间: 2017-07-04
上传用户:waitingfy
资源简介:Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparisons
上传时间: 2017-07-18
上传用户:Zxcvbnm
资源简介:The Fuzzy Logic Toolbox™ product extends the MATLAB® technical computing environment with tools for designing systems based on fuzzy Logic. Graphical user interfaces (GUIs) guide you through the steps of fuzzy inference system de...
上传时间: 2013-12-29
上传用户:fandeshun
资源简介: 本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's ...
上传时间: 2013-10-15
上传用户:dancnc
资源简介:The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or com...
上传时间: 2014-11-22
上传用户:xcy122677
资源简介:Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking over the role traditionallyassigned to t...
上传时间: 2013-11-20
上传用户:lijianyu172
资源简介: 本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's ...
上传时间: 2013-10-11
上传用户:sardinescn
资源简介:1)Learn more about the capabilities in Quartus: 2)Learn to use different design entry techniques 2)Design entry methods available within Quartus Text editor,Block diagram/schematic file editor, Quartus interface with design entry/Synthes...
上传时间: 2014-01-18
上传用户:yxgi5
资源简介:PHP Cookbook has a wealth of solutions for problems that you ll face regularly. With topics that range from beginner questions to advanced web programming techniques, this guide contains practical examples -- or "recipes" -- for anyone who ...
上传时间: 2014-12-03
上传用户:努力努力再努力
资源简介:The Rails Cookbook is is packed with the solutions you need to be a proficient developer with Rails, the leading framework for building the new generation of Web 2.0 applications. Recipes range from the basics, like installing Rails and set...
上传时间: 2013-12-23
上传用户:pkkkkp
资源简介:With the advent of multimedia, digital signal processing (DSP) of sound has emerged from the shadow of bandwidth-limited speech processing. Today, the main appli- cations of audio DSP are high quality audio coding and the digital generation...
上传时间: 2014-01-22
上传用户:xwd2010
资源简介:/* This software is copyrighted by and is the sole property of Express */ /* Logic, Inc. All rights, title, ownership, or other interests */ /* in the software remain the property of Express Logic, Inc. This */ /* ...
上传时间: 2017-03-03
上传用户:lindor
资源简介:Designing a synchronous finite state machine (FSM) is a common task for a digital Logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented...
上传时间: 2014-01-16
上传用户:dreamboy36