资源详细信息
PICMG-2.0-R3.0-CompactPCI-Specification（英文版） - 资源详细说明
System Management Bus pin assignments. This specification reserves pins on J1/P1 of all slots and J2/P2 of the System Slot for definition as I2C System Management Busses by PICMG 2.9, CompactPCI System Management Specification. These signals have been tentatively assigned by the PICMG 2.9 as indicated in Section 3.2.7.7 and in Tables 13 through 16 with their notes. The IPMB_SDA pin is an I2C data bus connecting all slots in a backplane. The IPMB_SCL pin is the clock associated with that data line, and the IPMB_PWR pin is a power pin for the IPMB node.
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