This paper reviews key factors to practical ESD
protection design for RF and analog/mixed-signal (AMS) ICs,
including general challenges emerging, ESD-RFIC interactions,
RF ESD design optimization and prediction, RF ESD design
characterization, ESD-RFIC co-design technique, etc. Practical
design examples are discussed. It means to provide a systematic
and practical design flow for whole-chip ESD protection design
optimization and prediction for RF/AMS ICs to ensure 1 st Si
design success.
