资源详细信息
基于频率插值的4.0kbps 语音编码器的性能和设计(英文) - 资源详细说明
The 4.0 kbit/s speech codec described in this paper is based on a
Frequency Domain Interpolative (FDI) coding technique, which
belongs to the class of prototype waveform Interpolation (PWI)
coding techniques. The codec also has an integrated voice
activity detector (VAD) and a noise reduction capability. The
input signal is subjected to LPC analysis and the prediction
residual is separated into a slowly evolving waveform (SEW) and
a rapidly evolving waveform (REW) components. The SEW
magnitude component is quantized using a hierarchical
predictive vector quantization approach. The REW magnitude is
quantized using a gain and a sub-band based shape. SEW and
REW phases are derived at the decoder using a phase model,
based on a transmitted measure of voice periodicity. The spectral
(LSP) parameters are quantized using a combination of scalar
and vector quantizers. The 4.0 kbits/s coder has an algorithmic
delay of 60 ms and an estimated floating point complexity of
21.5 MIPS. The performance of this coder has been evaluated
using in-house MOS tests under various conditions such as
background noise. channel errors, self-tandem. and DTX mode
of operation, and has been shown to be statistically equivalent to
ITU-T (3.729 8 kbps codec across all conditions tested.
Frequency Domain Interpolative (FDI) coding technique, which
belongs to the class of prototype waveform Interpolation (PWI)
coding techniques. The codec also has an integrated voice
activity detector (VAD) and a noise reduction capability. The
input signal is subjected to LPC analysis and the prediction
residual is separated into a slowly evolving waveform (SEW) and
a rapidly evolving waveform (REW) components. The SEW
magnitude component is quantized using a hierarchical
predictive vector quantization approach. The REW magnitude is
quantized using a gain and a sub-band based shape. SEW and
REW phases are derived at the decoder using a phase model,
based on a transmitted measure of voice periodicity. The spectral
(LSP) parameters are quantized using a combination of scalar
and vector quantizers. The 4.0 kbits/s coder has an algorithmic
delay of 60 ms and an estimated floating point complexity of
21.5 MIPS. The performance of this coder has been evaluated
using in-house MOS tests under various conditions such as
background noise. channel errors, self-tandem. and DTX mode
of operation, and has been shown to be statistically equivalent to
ITU-T (3.729 8 kbps codec across all conditions tested.
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