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找到约 2,951 项符合
W 的代码
topclock.ut
-w
-g DebugBitstream:No
-g Binary:no
-g Gclkdel0:11111
-g Gclkdel1:11111
-g Gclkdel2:11111
-g Gclkdel3:11111
-g ConfigRate:4
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:Pu
bitgen.rsp
-w
-g DebugBitstream:No
-g Binary:no
-g Gclkdel0:11111
-g Gclkdel1:11111
-g Gclkdel2:11111
-g Gclkdel3:11111
-g ConfigRate:4
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:Pu
bestsave.w
(wiring
# Wiring file created by Allegro PCB Router V15.7 made 2006/05/31 at 22:07:34
(resolution MIL 10000)
# Net AOE
(wire (path TOP 80000 -9750000 250000 -9500000 500000)
(net AOE )
c6713.cmd
-w
-l rts6700.lib
-stack 400h
-heap 400h
MEMORY
{
IRAM : o=1000h,l=0x0002efff
}
SECTIONS
{
.text :> IRAM
.data :> IRAM
.bss :> IRAM
.cinit :> IRAM
top.ut
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g ConfigRate:1
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g UnusedPin:PullD
lcd.ut
-w
-g DebugBitstream:No
-g Binary:no
-g Gclkdel0:11111
-g Gclkdel1:11111
-g Gclkdel2:11111
-g Gclkdel3:11111
-g ConfigRate:4
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullU
freque.ut
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g ConfigRate:6
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullUp
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g
sp306_led_top.ut
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g ConfigRate:6
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullUp
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g
s3esk_startup.ut
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g ConfigRate:1
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g UnusedPin:PullD
s3esk_startup.ut
-w
-g DebugBitstream:No
-g Binary:no
-g CRC:Enable
-g ConfigRate:1
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g UnusedPin:PullD