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.include "<mark>t</mark>-macros.i" s<mark>t</mark>ar<mark>t</mark> PSW_BI<mark>T</mark>S = 0 poin<mark>t</mark>_dmap_a<mark>t</mark>_imem check_in<mark>t</mark>errup<mark>t</mark> (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BI<mark>T</mark>S <mark>t</mark>es<mark>t</mark>_s<mark>t</mark> ldi r10,#0x4001 s<mark>t</mark> r8, @(1,r10) <mark>t</mark>es<mark>t</mark>_s<mark>t</mark>: s<mark>t</mark> r8 ...

.include "t-macros.i" start PSW_BITS = PSW_DM ;;; Blat our DMAP registers so that they point at on-chip imem ldi r2, MAP_INSN | 0xf st r2, @(DMAP_REG,r0) ldi r2, MAP_INSN st r2, @(IMAP1_REG

.include "t-macros.i" start test_slae_1: loadpsw2 PSW_ST|PSW_FX loadacc2 a0 0x00 0x0AFF 0xF000 ldi r0, 4 slae a0, r0 checkacc2 1 a0 0x00 0x7FFF 0xFFFF test_slae_2: loadpsw2 PSW_ST|PSW_FX lo

.include "t-macros.i" start PSW_BITS = 0 point_dmap_at_imem check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w ldi r10, #0x4000 ld2w r8, @r10 ldi r10, #0x4001 test_ld2w: ld2w

.include "t-macros.i" start PSW_BITS = 0 point_dmap_at_imem check_interrupt (VEC_RIE&DMAP_MASK)+DMAP_BASE PSW_BITS test_rie_xx test_rie_xx: .short 0xe120, 0x0000 ;; Example of RIE cod

.include "t-macros.i" start PSW_BITS = PSW_C|PSW_F0|PSW_F1 ldi r6, #success@word mvtc r6, bpc ldi r6, #PSW_BITS mvtc r6, bpsw test_rte: RTE exit47 success: checkpsw2 1 PSW_BITS exit0

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vti_encoding:SR|utf8-nl vti_timelastmodified:TR|14 Dec 2002 11:36:10 -0000 vti_extenderversion:SR|4.0.2.4022 vti_cacheddtm:TX|14 Dec 2002 11:36:10 -0000 vti_filesize:IR|0 vti_cachedlinkinfo:VX|

/*--------------------------------------------------------------------*/ /* t r u m p e t . h */ /*