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;===================================================================== ; File Name : 2440slib.s ; Function : S3C2440 (Assembly) ; Date : March 09, 2002 ; Revision : Programming start (Febru

;========================================= ; NAME: 2440INIT.S ; DESC: C start up codes ; Configure memory, ISR ,stacks ; Initialize C-variables ; HISTORY: ; 2002.02.25:kwtark: ver 0.0 ; 2

;===================================================================== ; File Name : 2440slib.s ; Function : S3C2440 (Assembly) ; Date : March 09, 2002 ; Revision : Programming start (Febru

;========================================= ; NAME: 2440INIT.S ; DESC: C start up codes ; Configure memory, ISR ,stacks ; Initialize C-variables ; HISTORY: ; 2002.02.25:kwtark: ver 0.0 ; 2

;******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** ;* File Name : stm32f10x_vector.s ;* Author : MCD Application Team ;* Version : V2.0

addreg1 = r14 addreg2 = r15 c0 = f32 c1 = f33 c2 = f34 c3 = f35 c4 = f36 c5 = f37 c6 = f38 c7 = f39 c8 = f40 c9 = f41 c10 = f42 c11 = f43 c12 = f44 c13 = f45 c14 = f46 c15 = f47 .sdata .align 16 .data

// ****************************************************************************** // * * // * This file is part of XviD, a f

mov ar.pfs = r16 br.ret.sptk.few b0

addreg3 = r20 addreg4 = r21 addreg5 = r22 addreg6 = r23 one = f30 alloc r16 = ar.pfs, 1, 71, 0, 0 addl addreg1 = @gprel(.data_c0#), gp addl addreg2 = @gprel(.data_c2#), gp ;; add addreg

addreg1 = r14 addreg2 = r15 c0 = f32 c1 = f33 c2 = f34 c3 = f35 c4 = f36 c5 = f37 c6 = f38 c7 = f39 c8 = f40 c9 = f41 c10 = f42 c11 = f43 c12 = f44 c13 = f45 c14 = f46 c15 = f47 .sdata .align 16 .data