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; Input Frequency 12.00MHz ; Output Frequency 202.80MHz M_MDIV EQU 161 M_PDIV EQU 3 M_SDIV EQU 1 ; hdivn,pdivn FCLK:HCLK:PCLK ; 0,0 1:1:1 ; 0,1 1:1:2 ;

/* * linux/arch/arm/boot/compressed/head-s3c2410.S * * Copyright (C) 2001 MIZI Research, Inc. * * s3c2410 specific tweaks. This is merged into head.S by the linker. * */ #include

K 13 svn:eol-style V 6 native K 12 svn:keywords V 23 Author Date Id Revision END

K 13 svn:eol-style V 6 native K 12 svn:keywords V 23 Author Date Id Revision END

@ @ ARMv4L optimized DSP utils @ Copyright (c) 2004 AGAWA Koji @ @ This library is free software; you can redistribute it and/or @ modify it under the terms of the GNU Lesser Ge

/* * linux/arch/arm/boot/compressed/head-s3c2410.S * * Copyright (C) 2001 MIZI Research, Inc. * * s3c2410 specific tweaks. This is merged into head.S by the linker. * */ #include

#; $ as -o test.o -m64 -march=z900 gas-cfi-test.s && gcc -m64 -nostdlib -o test test.o .file "a.c" .text .align 4 .globl foo .type foo, @function foo: .cfi_startproc stmg %r8,%r15,64(%r15) .c

; Check special registers specified as pN. .text here: move $r3,$p0 move $r5,$p1 move $r6,$p2 move $r7,$p3 move $r8,$p4 move $r9,$p5 move $r5,$p6 move $r6,$p7 move $r7,$p8 move $r2,$p9 mo

; Check that byte- and word-size special registers on CRISv32 ; take 32-bit immediate operands, as opposed to pre-v32 CRIS. .text here: move 0xfefdfcfa,$vr move 0xf00fba11,$pid move extsym,$srs

; Check correct disassembly of special registers. .text here: move $r3,$vr move $r5,$pid move $r6,$srs move $r7,$wz move $r8,$exs move $r9,$eda