代码搜索：4
找到约 10,000 项符合「4」的源代码
代码结果 10,000
www.eeworm.com/read/146454/12647315
cmd c4_4_7.cmd
MEMORY {
PAGE 0: PARAM: org = 3000h len = 4000h
PAGE 1: DARAM: org = 100h len=4000h
}
SECTIONS{
www.eeworm.com/read/146454/12647323
asm c4_4_2.asm
.ref start
K_DATA_SIZE .set 256
filterdata .usect "filter_vars",K_DATA_SIZE
.data
.global test
.global inputdata
inputdata:
www.eeworm.com/read/146454/12647353
cmd c4_6_4.cmd
fft_final.obj
vectors.obj
-m fft.map
-o fft.out
-e reset
MEMORY {
PAGE 0:
VEC :origin=1c00h len = 0080
PARAM :org = 3000h len = 4000h
PAGE 1
www.eeworm.com/read/146454/12647395
cmd c4_1_4.cmd
MEMORY
{
PAGE 0: PARAM: org = 0800h len = 1780h
PAGE 1: DARAM: org = 080h len = 1780h
}
SECTIONS
{
www.eeworm.com/read/146449/12647984
v mult4x4.v
module mult4x4(out,a,b,clk);
output[7:0] out;
input[3:0] a,b;
input clk;
reg[7:0] out;
reg[1:0] firsta,firstb;
reg[1:0] seconda,secondb;
wire[3:0] outa,outb,outc,outd;
always @(posedge clk)
www.eeworm.com/read/300713/13897454
v mult4x4.v
module mult4x4(out,a,b,clk);
output[7:0] out;
input[3:0] a,b;
input clk;
reg[7:0] out;
reg[1:0] firsta,firstb;
reg[1:0] seconda,secondb;
wire[3:0] outa,outb,outc,outd;
always @(posedge clk)
www.eeworm.com/read/135438/13929608
~dp d4r4.~dp
program d4r4;
uses
Forms,
Unit1 in 'Unit1.pas' {Form1},
Unit2 in 'Unit2.pas';
{$R *.RES}
begin
Application.Initialize;
Application.CreateForm(TForm1, Form1);
Application.Run
www.eeworm.com/read/135438/13929610
res d4r4.res
www.eeworm.com/read/135438/13929613
dof d4r4.dof
[Compiler]
A=1
B=0
C=1
D=1
E=0
F=0
G=1
H=1
I=1
J=1
K=0
L=1
M=0
N=1
O=1
P=1
Q=0
R=0
S=0
T=0
U=0
V=1
W=0
X=1
Y=1
Z=1
ShowHints=1
ShowWarnings=1
UnitAliases=WinTypes=Windows;