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-- ******************************************** LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; --*************************************

-- MAX+plus II Compiler Fit File -- Version 9.23 3/19/99 -- Compiled: 05/23/2000 11:52:22 -- Copyright (C) 1988-1999 Altera Corporation -- Any megafunction design, and

Project Information d:\lu\vhdl-digitallogic\disk\ch2\ch2_1_2.rpt MAX+plus II Compiler Report File Version 9.23 3/19/99 Compiled: 05/21/2000 10:15:55 Copyright (C) 1988-1999 Alter

-- Copyright (C) 1988-1999 Altera Corporation -- Any megafunction design, and related net list (encrypted or decrypted), -- support information, device programming or simulation file, and any other

NDB006 The number of symbol table entries is: 1 The length of the symbol table is: 13 Index Hierarchy Path ----- -------------- ! &null_hpath& The number of name info structs is : 4 InsOr

Project Information d:\lu\vhdl-digitallogic\disk\ch2\ch2_2_3.rpt MAX+plus II Compiler Report File Version 9.23 3/19/99 Compiled: 05/23/2000 11:52:22 Copyright (C) 1988-1999 Alter

NDB006 The number of symbol table entries is: 1 The length of the symbol table is: 13 Index Hierarchy Path ----- -------------- ! &null_hpath& The number of name info structs is : 7 InsOr

-- -- Copyright (C) 1988-1999 Altera Corporation -- Any megafunction design, and related net list (encrypted or decrypted), -- support information, device programming or simulation file, and any

-- ******************************************** LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; --*************************************