STM32H750VBT6核心板 ALTIUM设计硬件原理图+PCB文件，包括完整的原理图和PCB文件，可以做为你的设计参考，PCB 2层板设计，大小85MM*56MM, 带SD，DCMI,QSPI,外扩flash，以太网，RS485，CAN总线, 主要器件信号列表如下：Library Component Count : 29Name Description----------------------------------------------------------------------------------------------------AMS1117 三端稳压芯片BAT54C 表贴肖特基二极管C 无极性贴片电容CRYSTAL_32K CrystalCap CapacitorFPC0.5-24P 贴片FU 贴片保险丝HR911105Header 2 Header, 2-PinLLAN8720 ETH PHYLED Typical RED, GREEN, YELLOW, AMBER GaAs LEDMAX3485PNP PNP三极管Pin HDR2X20 R 贴片电阻Res ResisterSN65HVD230D STM32H750VBT6 Socket SocketTCAP 钽电容TEST-POINT 测试点TSW 轻触开关USB type C W25Qxx 外置FlashXC6206-3.3 SOT-23,XC6206P332MR,MAX8V,100mAXTAL-4P 4脚无源晶振XTAL_3225 Crystal OscillatormicroSD
上传时间： 2021-11-24
上传用户：aben
STM32L475开发板PDF原理图+AD集成3D封装库+主要器件技术手册，集成封装库型号列表如下：Library Component Count : 44Name Description----------------------------------------------------------------------------------------------------ANT-2.4G ANT,2.4G,PCB天线ATK-TEST-1*4-2.54mm 测试点ATK_MODULE 单排母,1*6,2.54mmBEEP 3.3V有源蜂鸣器BUTTON_DIP3 拨动开关SS-12F44C-0402-SMD C-0603-SMD C-CAP-SMD-220uF/10V C-CEP-220uF/16V D-1N4148 Header-1*3-2.54mm 单排针-2.54mmHeader-2*10-2.54mm 双排针-2.54mmHeader-2*2-2.54mm 双排针-2.54mmHeader-2*3-2.54mm 双排针-2.54mmHeader-2*4-2.54mm 双排座-2.54mmIR-LED 1206红外发射管（侧）IR-LF0038GKLL-1 红外接收管SMDJ-MICRO-USB-5S Micro USB 5.9有柱脚长1.25加长针L-0420-4.7uH 电感,4.7uH,3ALCD-TFT-H13TS38A LCD,TFT,1.3'240*240,禹龙LED-0603-RED 发光二极管-红色LED-RGB-1615-0603 RGB,共阳,1615,0603MIC-6022 MICMotor-SMD 电机,SMDPhone-3-M 耳机座,三节R-0402-SMD 贴片电阻R-0805-SMD 贴片电阻RT9193-3.3S-KEY-SMD-324225 KEY,SMD,324225S8050-SMD SD-MICRO-TF SD,MICRO,TFU-AHT10 Sensor,温湿度传感器U-AP3216C Sensor.光照/距离U-AP6181 WIFI Module,SDIOU-ES8388 AUDIO,2-ch DAC,2-ch ADCU-ICM-20608 三轴陀螺仪/三轴加速度计,U-L9110S 电机驱动,800mAU-RT9013-3.3 LDO,500mAU-STM32F103C8T6 U-STM32L475VET6 MCU,LQFP100,512K FLASH,128K RAMU-W25Q128 SPI FLASH,16MY-12M-SMD 晶振 - 12M贴片Y-3215-32.768K XTAL,3215,32.768KY-3215-8M XTAL,3215,8MHz
上传时间： 2021-12-15
上传用户：
STM32F407单片机开发板PDF原理图+AD集成封装库+主要器件技术手册资料:AD集成封装库列表：Library Component Count : 54Name Description----------------------------------------------------------------------------------------------------24C256 AMS1117ATK-HC05 ATK-HC05BAT BEEP BUTTONC CAPCH340G USB2UARTDDB9 DHT11 数字温湿度传感器HEAD2HEAD2*22 HR911105 HS0038Header 16 Header, 16-PinHeader 2 Header, 2-PinHeader 2X2 Header, 2-Pin, Dual rowHeader 3X2 Header, 3-Pin, Dual rowHeader 4 Header, 4-PinHeader 9X2 Header, 9-Pin, Dual rowIS62WV51216 JTAG KEY_M L LAN8720 ETH PHYLED2 Typical RED, GREEN, YELLOW, AMBER GaAs LEDLSENS LIGHT SENSL_SOP MAX3232 MAX3485 MIC MOS-P IRLML6401/SI2301MP2359 DC DC Step Down ICMPU6050 9轴运动处理传感器NPN 8050/BCW846/BCW847NRF24L01 PHONE_M PNP 8550/BCW68POW R SMBJ TVSSN65HVD230D STM32F407ZET6 STM32F407ZET6TEST-POINT 测试点TFT_LCD TPAD ALIENTEK TPADUSB5USB_A_90 USB-A-90W25X16
上传时间： 2021-12-15
上传用户：ttalli
FPGA读取OV5640摄像头数据并通过VGA或LCD屏显示输出的Verilog逻辑源码Quartus工程文件+文档说明，FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, output cmos_scl, //cmos i2c clock inout cmos_sda, //cmos i2c data input cmos_vsync, //cmos vsync input cmos_href, //cmos hsync refrence,data valid input cmos_pclk, //cmos pxiel clock output cmos_xclk, //cmos externl clock input [7:0] cmos_db, //cmos data output cmos_rst_n, //cmos reset output cmos_pwdn, //cmos power down output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data);
上传时间： 2021-12-18
上传用户：
基于FPGA设计的字符VGA LCD显示实验Verilog逻辑源码Quartus工程文件+文档说明,通过字符转换工具将字符转换为 8 进制 mif 文件存放到单端口的 ROM IP 核中，再从ROM 中把转换后的数据读取出来显示到 VGA 上，FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;wire osd_hs;wire osd_vs;wire osd_de;wire[7:0] osd_r;wire[7:0] osd_g;wire[7:0] osd_b;assign vga_out_hs = osd_hs;assign vga_out_vs = osd_vs;assign vga_out_r = osd_r[7:3]; //discard low bit dataassign vga_out_g = osd_g[7:2]; //discard low bit dataassign vga_out_b = osd_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0 (clk ), .c0 (video_clk ));color_bar color_bar_m0( .clk (video_clk ), .rst (~rst_n ), .hs (video_hs ), .vs (video_vs ), .de (video_de ), .rgb_r (video_r ), .rgb_g (video_g ), .rgb_b (video_b ));osd_display osd_display_m0( .rst_n (rst_n ), .pclk (video_clk ), .i_hs (video_hs ), .i_vs (video_vs ), .i_de (video_de ), .i_data ({video_r,video_g,video_b} ), .o_hs (osd_hs ), .o_vs (osd_vs ), .o_de (osd_de ), .o_data ({osd_r,osd_g,osd_b} ));endmodule
上传时间： 2021-12-18
上传用户：
基于FPGA设计的vga显示测试实验Verilog逻辑源码Quartus工程文件+文档说明，FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。module top( input clk, input rst_n, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue );wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;assign vga_out_hs = video_hs;assign vga_out_vs = video_vs;assign vga_out_r = video_r[7:3]; //discard low bit dataassign vga_out_g = video_g[7:2]; //discard low bit dataassign vga_out_b = video_b[7:3]; //discard low bit data//generate video pixel clockvideo_pll video_pll_m0( .inclk0(clk), .c0(video_clk));color_bar color_bar_m0( .clk(video_clk), .rst(~rst_n), .hs(video_hs), .vs(video_vs), .de(video_de), .rgb_r(video_r), .rgb_g(video_g), .rgb_b(video_b));endmodule
标签： fpga vga显示 verilog quartus
上传时间： 2021-12-19
上传用户：kingwide
LED 线阵显示装置, 分为 LED 线性旋转显示主机和图文录入器两部分。主机用直流电机带动由红绿 LED 组成的线阵旋转, 同时线阵按照时序依次切换显示状态, 在固定区域利用视觉暂留效果形成 16×16 点阵, 用以显示图文;图文录入器用 HMI 触控屏作为人机交互界面, 实现图文录入和回放功能。主机与图文录入器通过无线通信方式进行信息交互,可由图文录入器控制主机切换不同工作任务, 以及改变线阵显示内容。The LED linear array display device is divided into two parts:the one is the main unit used to display content,and the other one is used to input the contents.The main unit is driven by a DC motor to rotate the linear array composed by red and green light emitting diodes.At the same time,the 16×16 dot matrix that switching the display state according to the time sequence on the main unit displays pictures and texts in the fixed area,by using the visual temporary effect.The HMI touch screen is used as human machine interface to realize the function that input and playback pictures and texts.The two parts of the device communicate with each other through wireless communication.The image and text input controller can control the main unit to switch different tasks and change the content of linear array displayed.
标签： stc12c5a60s2 单片机 led
上传时间： 2022-03-28
上传用户：jiabin
This release supports Microsoft Windows NT 4.0, Windows 2000, Windows 95, Windows 98, Windows Me, Windows XP, Red Hat Linux 6.1, Red Hat Linux 7.2, Solaris 2.6, 2.7 (7.0), 8.0, HP-UX 10.20, and 11 (see important note below)." multice22.rar
上传时间： 2013-05-15
上传用户：eeworm
