This Interface Control Document (ICD) defines the requirements related to the interface between the Space Segment (SS) of the Global Positioning System (GPS) and the Navigation User Segment (US) of the GPS.
标签： Interface Control Document gps
上传时间： 2016-01-20
上传用户：芃发发da
强化学习通过试错与环境交互获得策略的改进,其自学习和在线学习的特点使其成为机器学习研究的一个重要分支.该文首先介绍强化学习的原理和结构;其次构造一个二维分类图,分别在马尔可夫环境和非马尔可夫环境下讨论最优搜索型和经验强化型两类算法;然后结合近年来的研究综述了强化学习技术的核心问题,包括部分感知、函数估计、多agent强化学习,以及偏差技术;最后还简要介绍强化学习的应用情况和未来的发展方向.
标签： 强化学习
上传时间： 2016-03-26
上传用户：liyanfei
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio™ suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio™ Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上传时间： 2016-05-06
上传用户：fagong
simple scalar simulator user guide!
标签： simplescalar manal
上传时间： 2016-05-26
上传用户：hitlitao
2012系统请手工注册 User:GNU Serial:918A8-20DD8-44ZA1-B0W4A-13T66 方便在服务器更改网页内容
上传时间： 2017-03-20
上传用户：testttt
msp430f5529的技术指导书user guide
上传时间： 2017-04-06
上传用户：amandadada
西门子APOGEE Field Panel使用手册
标签： BACnet Field Panel 西门子
上传时间： 2017-07-13
上传用户：monicard
MyBatis是JavaEE最流行的框架之一，这本书主要介绍了MyBatis的使用及其特点
标签： Simplified MyBatis Chinese Guide User
上传时间： 2017-08-12
上传用户：awomanofsin
FMA2600使用手册，可以使用者更快的了解和使用
上传时间： 2017-12-07
上传用户：cgb2020
本文主要介绍如何在Vivado设计套件中进行时序约束，原文出自Xilinx中文社区。 Vivado软件相比于ISE的一大转变就是约束文件，ISE软件支持的是UCF(User Constraints File)，而Vivado软件转换到了XDC(Xilinx Design Constraints)。XDC主要基于SDC(Synopsys Design Constraints)标准，另外集成了Xilinx的一些约束标准，可以说这一转变是Xilinx向业界标准的靠拢。Altera从TimeQuest开始就一直使用SDC标准，这一改变，相信对于很多工程师来说是好事，两个平台之间的转换会更加容易些。
上传时间： 2018-07-13
上传用户：yalsim
