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单片机开发 This article descrice how to use unnecessary I／O in the 51MCU to test the temperature, circuit is si
This article descrice how to use unnecessary I／O in the 51MCU to test the temperature, circuit is simple.
电源技术 使用5V电源的高分辨率视频解决方案
 
Video cable driver amplifi er output stages traditionallyrequire a supply voltage of at least 6V in order to providethe required output swing. This requirement is usuallymet with 5V supplies by adding a boost regulator or asmall local negative rail, say via the popular LT®1983-3.Such ...
教程资料 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
可编程逻辑 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
Java书籍 In today’s IT environment, Java is a leading technology in the world of enterprise development. As
In today’s IT environment, Java is a leading technology in the world of enterprise
development. As management demands more from technology, complexity
in infrastructure seems to grow exponentially, leaving many unable to
keep up with the demands of such a fast-paced world. These complexities
can be ...
编辑器/阅读器 ResOrg 图形化管理Vc项目的资源ID的工具的源代码。 ResOrg - Manage and Renumber Resource Symbol IDs Introduction The
ResOrg 图形化管理Vc项目的资源ID的工具的源代码。
ResOrg - Manage and Renumber Resource Symbol IDs
Introduction
The Resource ID Organiser (ResOrg for short) is an Add-in for Visual C++ designed to help overcome one of the most annoying (and unnecessary) chores of developing/maintaining Windows applic ...
论文 Analysis+of+Device-to-Device+Communications
Device-to-device(D2D) communications are now considered as an integral part of future 5G networks
which will enable direct communication between user equipment (UE) without unnecessary routing via
the network infrastructure. This architecture will result in higher throughputs than conventional cellu ...