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matlab例程 Link & System-Level Wireless OFDM System Simulator Version

Link & System-Level Wireless OFDM System Simulator Version,仿真了OFDM
https://www.eeworm.com/dl/665/250225.html
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其他书籍 Digital Signal Processing System Level Design Using LabVIEW

Digital Signal Processing System Level Design Using LabVIEW,基于LabViEW的数字信号处理系统设计参考书。
https://www.eeworm.com/dl/542/266553.html
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文章/文档 基于OFDM的无线宽带系统仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator.

基于OFDM的无线宽带系统仿真It contains mainly two parts, i.e. link-level simulator and system-level simulator. Link-level simulator focus on a single-cell single-user scenario, where signal is transmitted from tx, and estimated at rx. Comparing the difference in tx/rx signal, the error rate can be f ...
https://www.eeworm.com/dl/652/271693.html
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其他 Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理

Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理教材。
https://www.eeworm.com/dl/534/375318.html
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allegro US Navy VHDL Modelling Guide

  This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
https://www.eeworm.com/dl/allegro/20112.html
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单片机编程 P89LPC912英文资料

The P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system level functions have been incorporated into the P89LPC912 ...
https://www.eeworm.com/dl/502/28732.html
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单片机编程 Virtex-5, Spartan-DSP FPGAs Ap

Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step ...
https://www.eeworm.com/dl/502/30664.html
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教程资料 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

  中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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教程资料 FPGA设计重利用方法(Design Reuse Methodology)

  FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many a ...
https://www.eeworm.com/dl/fpga/doc/32621.html
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无线通信 射频和微波系统的建模与仿真

Abstract: This application note describes system-level characterization and modeling techniques for radio frequency (RF) and microwavesubsystem components. It illustrates their use in a mixed-signal, mixed-mode system-level simulation. The simulation uses an RF transmitterwith digital predistortio ...
https://www.eeworm.com/dl/510/36144.html
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