搜索结果
找到约 18 项符合
specifying 的查询结果
按分类筛选
Java书籍 A Java virtual machine instruction consists of an opcode specifying the operation to be performed, f
A Java virtual machine instruction consists of an opcode specifying the operation to be performed, followed by zero or more operands embodying values to be operated upon. This chapter gives details about the format of each Java virtual machine instruction and the operation it performs.
Java书籍 A Java virtual machine instruction consists of an opcode specifying the operation to be performed, f
A Java virtual machine instruction consists of an opcode specifying the operation to be performed, followed by zero or more operands embodying values to be operated upon. This chapter gives details about the format of each Java virtual machine instruction and the operation it performs.
Java书籍 A Java virtual machine instruction consists of an opcode specifying the operation to be performed, f
A Java virtual machine instruction consists of an opcode specifying the operation to be performed, followed by zero or more operands embodying values to be operated upon. This chapter gives details about the format of each Java virtual machine instruction and the operation it performs.
Java书籍 A Java virtual machine instruction consists of an opcode specifying the operation to be performed, f
A Java virtual machine instruction consists of an opcode specifying the operation to be performed, followed by zero or more operands embodying values to be operated upon. This chapter gives details about the format of each Java virtual machine instruction and the operation it performs.
单片机开发 There are three ways of specifying an immediate dump Immediate dumps can be specified using the AL
There are three ways of specifying an immediate dump
Immediate dumps can be specified using the ALTER SESSION command
ALTER SESSION SET EVENTS
immediate trace name dump level level
Immediate dumps can be specified in ORADEBUG
ORADEBUG DUMP dump level
模拟电子 音频数模转换器DAC抖动的灵敏度分析
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequenc ...
模拟电子 提高在噪声环境下的磁卡读写器(MCR)系统
Abstract: Most magnetic read head data sheets do not fully specify the frequency-dependent components andare often vague when specifying other key parameters. In some cases, the specifications of two very similarheads from two different manufacturers might be quite different in terms of parameters ...
电源技术 电压基准的理解和应用
&nbsp;
Specifying the right reference and applying it correctly isa more difficult task than one might first surmise, consideringthat references are only 2- or 3-terminal devices.Although the word &ldquo;accuracy&rdquo; is most often spoken inreference to references, it is dangerous to use this ...
教程资料 Allegro FPGA System Planner中文介绍
完整性高的FPGA-PCB系统化协同设计工具
Cadence OrCAD and Allegro FPGA System Planner便可满足较复杂的设计及在设计初级产生最佳的I/O引脚规划，并可透过FSP做系统化的设计规划，同时整合logic、schematic、PCB同步规划单个或多个FPGA pin的最佳化及layout placement，借由整合式的界面以减少重复在design及P ...
可编程逻辑 Allegro FPGA System Planner中文介绍
完整性高的FPGA-PCB系统化协同设计工具
Cadence OrCAD and Allegro FPGA System Planner便可满足较复杂的设计及在设计初级产生最佳的I/O引脚规划，并可透过FSP做系统化的设计规划，同时整合logic、schematic、PCB同步规划单个或多个FPGA pin的最佳化及layout placement，借由整合式的界面以减少重复在design及P ...