源码文件
[ C1 RAD0.2 0.1uF ] [ C2 RAD0.2 0.1uF ] [ C3 RAD0.2 0.1uF ] [ C4 RAD0.2 0.1uF ] [ C5 …
serial+port 源代码
汇集 serial+port 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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源码文件
Layer Pairs Export File for PCB: C:\Program Files\Altium\Examples\4 Port Serial Interface\4 Port Serial Interface.PcbDoc LayersSe…
源码文件
%FSLAX23Y23*% %MOIN*% G70* G01* G75* %ADD10O,0.050X0.300*% %ADD11C,0.009*% %ADD12C,0.010*% %ADD13C,0.020*% %ADD14C,0.006*…
源码文件
%FSLAX23Y23*% %MOIN*% G70* G01* G75* G04 Layer_Physical_Order=2* %ADD10O,0.050X0.300*% %ADD11C,0.009*% %ADD12C,0.010*% %A…
源码文件
%FSLAX23Y23*% %MOIN*% G70* G01* G75* %ADD10O,0.050X0.300*% %ADD11C,0.009*% %ADD12C,0.010*% %ADD13C,0.020*% %ADD14C,0.006*…
源码文件
DRC Rules Export File for PCB: C:\Program Files\Altium\Examples\4 Port Serial Interface\4 Port Serial Interface.PcbDoc RuleKind=W…
源码文件
%FSLAX23Y23*% %MOIN*% G70* G01* G75* %ADD10O,0.050X0.300*% %ADD11C,0.009*% %ADD12C,0.010*% %ADD13C,0.020*% %ADD14C,0.006*…
源码文件
%FSLAX23Y23*% %MOIN*% G70* G01* G75* %ADD10O,0.050X0.300*% %ADD11C,0.009*% %ADD12C,0.010*% %ADD13C,0.020*% %ADD14C,0.006*…
源码文件
(edif &4_Port_Serial_Interface_PRJPCB (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0) ) (statu…
源码文件
--------------------------------------------------------------------------- NCDrill File Report For: 4 Port Serial Interface.PcbD…