源码文件
Release 6.1i Map G.23 Xilinx Mapping Report File for Design 'TST11' Design Information ------------------ Command Line : C:/Xil…
reusable+design 源代码
汇集 reusable+design 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
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源码文件
Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'clock' Design Information ------------------ Command Line : C:/Xil…
源码文件
(ExpressProject "Design1" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Librar…
源码文件
DE2_Default ----------- This design is the initial design when the board is powered-up. It increments a counter and displays t…
源码文件
ispEXPERT Compiler Release 7.0.15, Nov 4 1998 14:24:11 Copyright (C) 1994-1998 by Lattice Semiconductor Corporation. All Righ…
源码文件
(ExpressProject "Design1" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Librar…
源码文件
Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'clock' Design Information ------------------ Command Line : C:/Xil…
源码文件
Release 6.1i Map G.23 Xilinx Mapping Report File for Design 'fen' Design Information ------------------ Command Line : E:/Xilin…
源码文件
Release 7.1.04i Map H.42 Xilinx Mapping Report File for Design 'buzzer' Design Information ------------------ Command Line : D:…
源码文件
(ExpressProject "Design1" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Librar…