The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication controller and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.
标签： MULTICHANNEL 5.5 TO RS
上传时间： 2013-10-19
上传用户：ddddddd
文章提出了一种精简指令集8 位单片机中, 算术逻辑单元的工作原理。在此基础上, 对比传统PIC 方案、以及在ALU 内部再次采用流水线作业的332 方案、44 方案, 并用Synopsys 综合工具实现了它们。综合及仿真结果表明, 根据该单片机系统要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面积仅比最小的332 方案增加1.6%。在分析性能差异的根本原因之后, 阐明了该方案的优越性。关键词: 单片机, 精简指令集, 算术逻辑单元, 流水线 Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 Pipeline scheme and 44 Pipeline scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, Pipeline
上传时间： 2013-10-18
上传用户：xiaoyaa
Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.
上传时间： 2014-01-03
上传用户：Huge_Brother
SL811开发资料_包含源程序_电路图_芯片资料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
上传时间： 2013-12-22
上传用户：a82531317
DIGITAL IMAGERY is pervasive in our world today. Consequently, standards for the efficient representation and interchange of digital images are essential. To date, some of the most successful still image compression standards have resulted from the ongoing work of the Joint Photographic Experts Group (JPEG). This group operates under the auspices of Joint Technical Committee 1, Subcommittee 29, Working Group 1 (JTC 1/SC 29/WG 1), a collaborative effort between the International Organization for Standardization (ISO) and International Telecommunication Union Standardization Sector (ITUT). Both the JPEG [1–3] and JPEG-LS [4–6] standards were born from the work of the JPEG committee. For the last few years, the JPEG committee has been working towards the establishment of a new standard known as JPEG 2000 (i.e., ISO/IEC 15444). The fruits of these labors are now coming to bear, as JPEG-2000 Part 1 (i.e., ISO/IEC 15444-1 [7]) has recently been approved as a new international standard.
标签： Consequently efficient pervasive standards
上传时间： 2013-12-21
上传用户：源弋弋
一个简单的ＳＰＩ ＩＰ核，SPI Core Specifications 可以从说明文档中找到！ The simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous communication protocol that requires a minimum of 3 wires. FEATURES: · Compatible with Motorola’s SPI specifications · Enhanced M68HC11 Serial Peripheral Interface · 4 entries deep read FIFO · 4 entries deep write FIFO · Interrupt generation after 1, 2, 3, or 4 transferred bytes · 8 bit WISHBONE RevB.3 Classic interface · operates from a wide range of input clock frequencies · Static synchronous design · Fully synthesizable
标签：
上传时间： 2015-09-17
上传用户：TRIFCT
water temperature control system uses the Single Chip Microcomputer to carry on temperature real-time gathering and controling. DS18B20, digitized temperature sensor, provides the temperature signal by "a main line". In -10～+85℃ the scope, DS18B20’s inherent measuring accuracy is 0.5 ℃. The water temperature real-time control system uses the electricity nichrome wire carring on temperature increiseament and operates the electric fan to realize the temperature decrease control. The system has the higher measuring accuracy and the control precision, it also can complete the elevation of temperature and the temperature decrease control.
标签： temperature Microcomputer real-tim control
上传时间： 2015-12-10
上传用户：nairui21
This application report describes the use of Timer_A3 to decode RC5 and SIRC TV IR remote control signals. The decoder described in this report is interrupt-driven and operates a background function using specific features the Timer_A3. Only a small portion of the MSP430 CPU?s nonreal-time resources is used. Specific hardware bit-latching capabilities of the Timer_A3 module are used for real-time decoding of the IR data signal, independent and asynchronous to the CPU. CPU activity and power consumption are kept to an absolute minimum level. The Timer_A3 decoder implementation also allows other tasks to occur simultaneously if required. The solutions provided are written specifically for MSP430x11x(1) and MSP430x12x derivatives, but can be adapted to any other MSP430 incorporating Timer_A3. 電視遙控器設計基於MSP430
标签： application describes Timer_A control
上传时间： 2014-01-01
上传用户：qq21508895
Scotia Airlines is a new budget airline operating between Glasgow Airport and the Western Isles. It operates two 24-seater light passenger aircraft and requires a flight booking system. Because Scotia offers low cost air travel, there is a need to treat each flight as single cost centre and to be able to ascertain, at any moment, the amount of the cash taken for that flight. Reservations and bookings cannot be made until the flight details have been finalised (flight number, departure and arrival airports). A seat on a flight is considered booked when payment as been received for it. When a reservation is confirmed (changed to booked), the passenger name is checked against the original reservation. A flight can be in any of the following states: Available for bookings Checking in Boarding Closed
标签： operating Airlines Glasgow Airport
上传时间： 2016-03-25
上传用户：hgy9473
Abstract: This thesis describes the incremental development and main features of a synthetic multi-agent system called UvA Trilearn 2001. UvA Trilearn 2001 is a robotic soccer simulation team that consists of eleven autonomous software agents. It operates in a physical soccer simulation system called soccer server which enables teams of autonomous software agents to play a game of soccer against each other.
标签： incremental development describes synthetic
上传时间： 2016-07-25
上传用户：zaizaibang
