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master-py

  • jsf做的增删改的例子

    jsf做的增删改的例子,比较短小,代码不多,但展现了做master-detail时的思路,可以参考

    标签: jsf

    上传时间: 2013-12-18

    上传用户:yepeng139

  • pyformat.zip包中有两个文件夹

    pyformat.zip包中有两个文件夹,pyformat_src文件夹里的为源代码,pyformat_dist文件夹里的为编译后的exe可执行程序,另外每个文件夹里都放了一个名为“testfile.txt”的测试文件。 源码使用方法示例:执行"python pyformat.py testfile.txt"。 可执行程序使用方法示例:执行“pyformat testfile.txt”。 即可把文件名中的不带调拼音+声调记号转化为带调拼音输出到stdout。文件名可以有多个。 例如:输入wo3 shi4 zhong1 guo2 ren2. 输出为wǒ shì zhōng guó rén. zho1ng、zhon1g、zhong1、zhong12341等均输出为zhōng。

    标签: pyformat zip

    上传时间: 2015-11-26

    上传用户:1427796291

  • VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register betw

    VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.

    标签: SPI bus register effect

    上传时间: 2013-12-23

    上传用户:lx9076

  • 如文件名

    如文件名,在LPC2138上的I2C的Master发送接受测试程序。里面的readme.txt(英)有详细说明。

    标签:

    上传时间: 2015-12-01

    上传用户:eclipse

  • This document contains a general overview in the first few sections as well as a more detailed refer

    This document contains a general overview in the first few sections as well as a more detailed reference in later sections for SVMpython. If you re already familiar with SVMpython, it s possible to get a pretty good idea of how to use the package merely by browsing through svmstruct.py and multiclass.py. This document provides a more in depth view of how to use the package. Note that this is not a conversion of SVMstruct to Python. It is merely an embedding of Python in existing C code. All code other than the user implemented API functions is still in C, including optimization.

    标签: document contains detailed overview

    上传时间: 2013-12-14

    上传用户:希酱大魔王

  • Avalon Interface Specification,The Avalon interface specification is designed to accommodate periphe

    Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on master and slave peripherals, such as microprocessors, memory, UART, timer, etc.

    标签: Avalon Specification specification accommodate

    上传时间: 2014-03-06

    上传用户:pompey

  • An AHB system is made of masters slaves and interconnections. A general approach to include all poss

    An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.

    标签: interconnections approach general include

    上传时间: 2015-12-12

    上传用户:lyy1234

  • 一般使用PC Based Controller 都是当作现场设备的一种

    一般使用PC Based Controller 都是当作现场设备的一种,也就是要接受 主系统的命令,做一些操作控制。以Modbus 来看属于Slave 的角色,随 时等待接收Modbus Master 的Query Message,然后依据内容做控制,最后 将控制结果以Response Message 回传。本章将以ICP 7524 及ICP 7188E5 等 两种设备分别设计Modbus RTU、ASCII 及Modbus/TCP 的Slave 应用程序, 读者可以将此两种程序的架构再延伸设计至各种实际应用程序。

    标签: Controller Based 现场设备

    上传时间: 2015-12-16

    上传用户:nanxia

  • 毕业课题部分程序: CY7C68013 Bulk IN 68013工作在AUTO IN模式

    毕业课题部分程序: CY7C68013 Bulk IN 68013工作在AUTO IN模式,16位总线 SLAVE FIFO.MASTER是 ADI BF533。

    标签: 68013 C68013 Bulk AUTO

    上传时间: 2013-12-22

    上传用户:aig85

  • This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Si

    This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only slave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM

    标签: configured accesses program EEPROM

    上传时间: 2016-03-29

    上传用户:gut1234567