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Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, D...
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👤 古谷仁美
Slave mode FX2LP Firmware for raw-data transfer from an external master (altera FPGA)...
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👤 gut1234567
master thesis for wireless ad hoc network...
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👤 lizhizheng88
simple program in using SPI as master in AVR atmega32...
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👤 xuanjie
simple program in using SPI as master in AVR atmega32...
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👤 ma1301115706
