X-MAC, a low power MAC protocol for wireless sensor networks (WSNs). Standard MAC protocols developed for duty-cycled WSNs such as BMAC, which is the default MAC protocol for TinyOS, employ an extended preamble and preamble sampling.
标签： MAC protocols Standard networks
上传时间： 2014-01-13
上传用户：王楚楚
Low Power ISM-Transceiver of Chipcon/Texas-Instruments. Contents of the library are CC1000, CC1000-UCSP, CC1020, CC1050, CC1100, CC1110, CC1150, CC2430, CC2500, CC2510, CC2511 and CC2550. Eagle Cadsoft Library
标签： Texas-Instruments ISM-Transceiver Contents Chipcon
上传时间： 2017-09-11
上传用户：llandlu
AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."
标签： single-chip developed threshold the
上传时间： 2017-09-12
上传用户：shinesyh
AVR single-chip developed by a very low threshold, as long as the computer will be able to study the development of AVR microcontroller. Only a single-chip ISP download beginners line, the editing, debugging of software programs through a direct line into the AVR microcontroller, which can develop AVR Series Single-chip package of a variety of devices. AVR single-chip microcomputer in the industry known as "front-line struggle to seize state power."
标签： single-chip developed threshold the
上传时间： 2013-12-09
上传用户：invtnewer
Visual Basic Low Level Disk Acces
上传时间： 2013-12-23
上传用户：王楚楚
The STi7105 uses state of the art process technology to provide an ultra low-cost, fully featured HD AVC decoder IC. It is a highly integrated system-on-chip suitable for STB markets across all networks (cable/satellite/DTT/x- DSL/IP) worldwide
标签： technology low-cost featured process
上传时间： 2013-12-22
上传用户：时代电子小智
Buffer low THD distortion and hi-impendance, Very wide frequency band.
标签： hi-impendance distortion frequency Buffer
上传时间： 2014-08-08
上传用户：dragonhaixm
PXA270 design guide low level primitives
标签： primitives design guide level
上传时间： 2014-06-30
上传用户：yxgi5
Low density parity check matrix
标签： density parity matrix check
上传时间： 2014-01-08
上传用户：yt1993410
现代社会信息量爆炸式增长，由于网络、多媒体等新技术的发展，用户对带宽和速度的需求快速增加。并行传输技术由于时钟抖动和偏移，以及PCB布线的困难，使得传输速率的进一步提升面临设计的极限；而高速串行通信技术凭借其带宽大、抗干扰性强和接口简单等优势，正迅速取代传统的并行技术，成为业界的主流。 本论文针对目前比较流行并且有很大发展潜力的两种高速串行接口电路——高速链路口和Rocket I/O进行研究，并以Xilinx公司最新款的Virtex-5 FPGA为研究平台进行仿真设计。本论文的主要工作是以某低成本相控阵雷达信号处理机为设计平台，在其中的一块信号处理板上，进行了基于LVDS(Low VoltageDifferential Signal)技术的高速LinkPort(链路口)设计和基于CML(Current ModeLogic)技术的Rocket I/O高速串行接口设计。首先在FPGA的软件中进行程序设计和功能、时序的仿真，当仿真验证通过之后，重点是在硬件平台上进行调试。硬件调试验证的方法是将DSP TS201的链路口功能与在FPGA中的模拟高速链路口相连接，进行数据的互相传送，接收和发送的数据相同，证明了高速链路口设计的正确性。并且在硬件调试时对Rocket IO GTP收发器进行回环设计，经过回环之后接收到的数据与发送的数据相同，证明了Rocket I/O高速串行接口设计的正确性。
上传时间： 2013-04-24
上传用户：恋天使569
