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找到约 9 项符合
interleaver 的查询结果
VHDL/FPGA/Verilog Convolutional Interleaver Encoder
Convolutional Interleaver Encoder
VHDL/FPGA/Verilog interleaver即交织器
interleaver即交织器，里面包含有C,VHDL,VRILOG HDL三种语言写的交织器,
包括各种各样的组合达六七十种，描写详尽，是一个难得的学习交织器的材料
书籍源码 interleaver design for coding
interleaver design for coding
通讯编程文档 documents for qpp interleaver for turbo coding
documents for qpp interleaver for turbo coding
压缩解压 block interleaver code
block interleaver code
通讯/手机编程 master interleaver with aks design..its a matlab code program.
master interleaver with aks design..its a matlab code program.
通讯/手机编程 This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is wr
This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise.
The packet include:
1) Packet Builder (Viterbi Encoding, Interleaver, PN generation)
2) Modulator (RRC filter)
3) Demodulator (Matched Filter, RAKE receiver)
...
matlab例程 his packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is w
his packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate.
The simulation is written for static channel and AWGN noise. The packet include:
1) Packet Builder (Viterbi Encoding, Interleaver, PN generation)
2) Modulator (RRC filter)
3) Demodulator (Matched Filter, RAKE receiver) ...
通讯/手机编程 This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is
This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate.
The simulation is written for static channel and AWGN noise. The packet include:
1) Packet Builder (Viterbi Encoding, Interleaver, PN generation)
2) Modulator (RRC filter)
3) Demodulator (Matched Filter, RAKE receiver ...