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查看全部 1,313 份 →Analog Circuit Design in Porta
•Founded in Jan. 08, 2001 in Shanghai, China.•Fabless IDH focused on Analog & Mixed Signal Chip design &...
2013-10-24
176
SystemVerilog for Design
·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). Th...
2013-07-14
100
Xilinx Synthesis & Simulation Design Guide
Xilinx Synthesis & Simulation Design Guide
2013-12-26
199