频率合成技术在现代电子技术中具有重要的地位。在通信、雷达和导航等设备中，它可以作为干扰信号发生器；在测试设备中，可作为标准信号源，因此频率合成器被人们称为许多电子系统的“心脏”。直接数字频率合成（DDS——Digital Direct Frequency Synthesis）技术是一种全新的频率合成方法，是频率合成技术的一次革命。本文主要分析了DDS的基本原理及其输出频谱特点，并采用VHDL语言在FPGA上实现。对于DDS的输出频谱，一个较大的缺点是：输出杂散较大。针对这一缺点本文使用了两个方法加以解决。首先是压缩ROM查找表，
上传时间： 2017-09-28
上传用户：大三三
OFDM(Orthogonal Frequency Division Multiplexing)即正交频分复用技术，实际上OFDM是多载波调制的一种。其主要思想是：将信道分成若干正交子信道，将高速数据信号转换成并行的低速子数据流，调制到在每个子信道上进行传输。正交信号可以通过在接收端采用相关技术来分开，这样可以减少子信道之间的相互干扰 ICI 。每个子信道上的信号带宽小于信道的相关带宽，因此每个子信道上的可以看成平坦性衰落，从而可以消除符号间干扰。而且由于每个子信道的带宽仅仅是原信道带宽的一小部分，信道均衡变得相对容易。
标签： OFDM
上传时间： 2015-02-17
上传用户：hongyun288
FILE NAME: dc_motor.c CHIP TYPE: ATMEGA16 CLOCK FREQUENCY: 8MHZ IDE: VSMStudio COMPILER: AVR-GCC
标签： PWM
上传时间： 2015-03-01
上传用户：abilibili
有多径信道、多普勒频移，瑞利、RICE(莱斯)信道等仿真，QPSK调制和解调等，交织编码。程序经过本人测试，绝对可用，并附上本人测试说明和仿真图像结果-I collected information on 2, how-path channel, Doppler frequency shift, Rayleigh, RICE (Rice) channel, such as simulation, QPSK modulation and demodulation, etc., Interleaved Coded. After I tested the procedure is absolutely available, along with my test images and simulation results indicate.
上传时间： 2015-06-16
上传用户：whtiger
自适应软频率复用技术在长期演进中上行上的应用，主要是如何解决小区边缘干扰问题。对小区边缘干扰提出了自适应软频率复用算法
标签： Interference Inter-cell Frequency Adaptive Reuse Soft for
上传时间： 2016-05-09
上传用户：cococo
msp430The LDC1312 and LDC1314 are 2- and 4-channel, 1• Easy-to-use – minimal configuration required 12-bit inductance to digital converters (LDCs) for • Measure up to 4 sensors with one IC inductive sensing solutions. With multiple channels • Multiple channels support environmental and and support for remote sensing, the LDC1312 and aging compensation LDC1314 enable the performance and reliability benefits of inductive sensing to be realized at minimal• Multi-channel remote sensing provides lowest cost and power. The products are easy to use, onlysystem cost requiring that the sensor frequency be within 1 kHz • Pin-compatible medium and high-resolution and 10 MHz to begin sensing. The wide 1 kHz to 10 options MHz sensor frequency range also enables use of very small PCB coils, further reducing sensing– LDC1312/4: 2/4-ch 12-bit LDC solution cost and size.– LDC1612/4: 2/4-ch 28
上传时间： 2016-07-22
上传用户：tongmoonsky
The AP2406 is a 1.5Mhz constant frequency, slope compensated current mode PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that runs from a single cell lithium-Ion (Li+) battery. The AP2406 can supply 600mA of load current from a 2.5V to 5.5V input voltage. The output voltage can be regulated as low as 0.6V. The AP2406 can also run at 100% duty cycle for low dropout operation, extending battery life in portable system. Idle mode operation at light loads provides very low output ripple voltage for noise sensitive applications. The AP2406 is offered in a low profile (1mm) 5-pin, thin SOT package, and is available in an adjustable version and fixed output voltage of 1.2V, 1.5V and 1.8V
上传时间： 2017-02-23
上传用户：w124141
ADI公司的引用笔记，讲解了锁相环在通信接收机和发射机的应用
标签： transmitters frequency receivers high pll for and
上传时间： 2017-03-13
上传用户：rfzhangyicheng
1.高频率pll 设计论文 2.描述相应的设计思想
标签： Synthesizer Frequency Charge Pump GHz PLL
上传时间： 2017-05-02
上传用户：橡树园林
The 4.0 kbit/s speech codec described in this paper is based on a Frequency Domain Interpolative (FDI) coding technique, which belongs to the class of prototype waveform Interpolation (PWI) coding techniques. The codec also has an integrated voice activity detector (VAD) and a noise reduction capability. The input signal is subjected to LPC analysis and the prediction residual is separated into a slowly evolving waveform (SEW) and a rapidly evolving waveform (REW) components. The SEW magnitude component is quantized using a hierarchical predictive vector quantization approach. The REW magnitude is quantized using a gain and a sub-band based shape. SEW and REW phases are derived at the decoder using a phase model, based on a transmitted measure of voice periodicity. The spectral (LSP) parameters are quantized using a combination of scalar and vector quantizers. The 4.0 kbits/s coder has an algorithmic delay of 60 ms and an estimated floating point complexity of 21.5 MIPS. The performance of this coder has been evaluated using in-house MOS tests under various conditions such as background noise. channel errors, self-tandem. and DTX mode of operation, and has been shown to be statistically equivalent to ITU-T (3.729 8 kbps codec across all conditions tested.
标签： frequency-domain interpolation performance Design kbit_s speech coder based and of
上传时间： 2018-04-08
上传用户：kilohorse
