Aodv for NS-2. A mobile ad-hoc network (MANET) is a kind of wireless ad-hoc network, and is a self-configuring network of mobile routers connected wirelessly. MANET may operate in a standalone fashion, or may be connected to the larger Internet. Many routing protocols have been developed for MANETs over the past few years. This project evaluated three specific MANET routing protocols which are Ad-hoc On-demand Distance Vector (AODV), Dynamic Source Routing (DSR) and Dynamic MANET Ondemand routing protocol (DYMO) to better understand the major characteristics of these routing protocols. Different performance aspects were investigated in this project including packet delivery ratio, routing overhead, throughput and average end-to-end delay.
标签： network ad-hoc wireless mobile
上传时间： 2014-01-12
上传用户：zsjzc
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2013-10-15
上传用户：busterman
Abstract: A resistive feedback network is often used to set the output voltage of a power supply. A mechanical potentiometer (pot)conveniently solves the problem of adjusting a power supply. For easier automatic calibration, a mechanical pot can be replaced witha digital pot. This application note presents a calibration solution that uses a digital pot, because digipots are smaller, do not movewith age or vibration, and can be recalibrated remotely. This proposed solution reduces the susceptibility of the system to thetolerance of the digital pot's end-to-end resistance, making the solution optimal fordesigners. This application note also explainssome of the equations required to calculate the resistor chain values and to use a digital pot in this way. A spreadsheet withstandard reisistor values is available for easy calculations.
上传时间： 2013-10-31
上传用户：caiguoqing
在理论分析循环码编码和译码基本原理的基础上，提出了基于单片机系统的(24，16)循环码软件实现编码、译码的方案。仿真结果表明(24，16)循环码能有效地克服来自通讯信道的干扰，保证数据通信的可靠及系统的稳定，使误码率大幅度降低。本论文对(24，16)循环码的研究结果表明，可以有效地降低错误概率和提高系统的吞吐量，实现纠错仅需要在接收端增加有限的存储空间和计算复杂度，具有一定的实用价值。 Abstract: Based on analyzing the theory of encoding and decoding of cyclic code， this paper showed the schemes of encoding and decoding of(24，16)cyclic code by the software and based on microcontroller. Simulation results show that using (24，16) cyclic codes can effectively overcome the interference from communication channel， ensure the reliability and stability of data communication systems， and reduce the bit error rate greatly. The results of this paper show that by using the (24，16) cyclic code， the error rate can be reduced and the system throughput can be improved. Meanwhile， the system only needs to enlarge limited storage space and computation the complexity at the receiving end to realize error correction. Thus the (24，16) cyclic code has a practical value.
上传时间： 2013-11-09
上传用户：gaoliangncepu
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-24
上传用户：s363994250
3GPP文件格式标准，英文版。 3rd Generation Partnership Project Technical Specification Group Services and System Aspects Transparent end-to-end packet switched streaming service (PSS) 3GPP file format (3GP) (Release 6)
上传时间： 2013-12-10
上传用户：Avoid98
symbian os手机程序开发，s60平台http client end to end
上传时间： 2016-06-13
上传用户：caixiaoxu26
pashload是应用在linux下的网络带宽测试源程序精确度比较高 ///////////////////////////////////// Pathload is a tool for estimating the available bandwidth of an end-to-end path from a host S (sender) to a host R (receiver). The available bandwidth is the maximum IP-layer throughput that a flow can get in the path from S to R, without reducing the rate of the rest of the traffic in the path.
标签： pashload Pathload linux tool
上传时间： 2016-06-29
上传用户：xzt
用来计算混沌时间序列的延迟时间,It s applied to calculate the delay time of chaos time series,
标签： time calculate applied series
上传时间： 2015-10-11
上传用户：songrui
To show Gibbs phenomenon, using FFTs to sum Fourier Give the curve plot at the end of the simulation
标签： the phenomenon simulati Fourier
上传时间： 2014-01-07
上传用户：佳期如梦
