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找到约 12 项符合 demodulator 的查询结果

其他 TAD10023 Demodulator From NXP.CU1216 is tuner.

TAD10023 Demodulator From NXP.CU1216 is tuner.
https://www.eeworm.com/dl/534/381542.html
下载: 185
查看: 1054

并行计算 receiver matlab demodulator

receiver matlab demodulator
https://www.eeworm.com/dl/694/412280.html
下载: 180
查看: 1023

通讯/手机编程 QAM 4 Modulator and Demodulator based on ETSI TETRA Standard

QAM 4 Modulator and Demodulator based on ETSI TETRA Standard
https://www.eeworm.com/dl/527/469397.html
下载: 148
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单片机编程 基于HITAG读写芯片HTRC110的读写设备设计

Designing read/write device (RWD) units for industrial RF-Identification applications is strongly facilitated by the NXP Semiconductors HITAG Reader Chip HTRC110. All needed function blocks, like the antenna driver, modulator demodulator and antenna diagnosis unit, are integrated in the HTRC11 ...
https://www.eeworm.com/dl/502/29066.html
下载: 108
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教程资料 基于CPLD的QDPSK调制解调电路设计

为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中 ...
https://www.eeworm.com/dl/fpga/doc/32656.html
下载: 44
查看: 1066

可编程逻辑 基于CPLD的QDPSK调制解调电路设计

为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中 ...
https://www.eeworm.com/dl/kbcluoji/40237.html
下载: 84
查看: 1028

通讯/手机编程 This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is wr

This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise. The packet include: 1) Packet Builder (Viterbi Encoding, Interleaver, PN generation) 2) Modulator (RRC filter) 3) Demodulator (Matched Filter, RAKE receiver) ...
https://www.eeworm.com/dl/527/140159.html
下载: 183
查看: 1111

matlab例程 his packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is w

his packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise. The packet include: 1) Packet Builder (Viterbi Encoding, Interleaver, PN generation) 2) Modulator (RRC filter) 3) Demodulator (Matched Filter, RAKE receiver) ...
https://www.eeworm.com/dl/665/194477.html
下载: 150
查看: 1060

其他书籍 This paper investigates the design of joint frequency offset and carrier phase estimation of a mult

This paper investigates the design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via satellite (DVB-RCS). The proposed joint estimation algorithm i ...
https://www.eeworm.com/dl/542/240339.html
下载: 198
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通讯/手机编程 This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is

This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise. The packet include: 1) Packet Builder (Viterbi Encoding, Interleaver, PN generation) 2) Modulator (RRC filter) 3) Demodulator (Matched Filter, RAKE receiver ...
https://www.eeworm.com/dl/527/275414.html
下载: 116
查看: 1063