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  • 一种8位单片机中ALU的改进设计

    文章提出了一种精简指令集8 位单片机中, 算术逻辑单元的工作原理。在此基础上, 对比传统PIC 方案、以及在ALU 内部再次采用流水线作业的332 方案、44 方案, 并用Synopsys 综合工具实现了它们。综合及仿真结果表明, 根据该单片机系统要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面积仅比最小的332 方案增加1.6%。在分析性能差异的根本原因之后, 阐明了该方案的优越性。关键词: 单片机, 精简指令集, 算术逻辑单元, 流水线 Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 Pipeline scheme and 44 Pipeline scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, Pipeline

    标签: ALU 8位单片机

    上传时间: 2013-10-18

    上传用户:xiaoyaa

  • Emulating a synchronous serial

    The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

    标签: synchronous Emulating serial

    上传时间: 2014-01-31

    上传用户:z1191176801

  • 基于以太网的虚拟示波器设计

    为提升虚拟仪器传输速率与实时性能,扩展监测范围,在VC的软件平台上设计了一种全功能虚拟示波器。与传统虚拟示波器相比,该系统采用嵌入式系统完成信号采集,采用工业以太网为传输介质,通过线性插值算法和多线程编程思想,实现波形显示、参数计算、频谱分析以及波形存储及回放功能。实验结果表明,该虚拟示波器可以实现20 kHz采样频率下的波形精确显示,达到预期的各项指标。 Abstract:  o enhance the transfer rate and real-time of virtual instrument performance, expand scope of monitoring, this paper uses the VCs software platform to design a fully functional virtual oscilloscope. compared with traditional virtual oscilloscope, this system adopts the embedded system to complete the data acquisition, industrial Ethernet as the transmission medium used by the linear interpolation algorithm and multi-threaded programming ideas, namely to achieve waveform display, parameter calculation, spectrum analysis and waveform storage and playback. Experimental results show that the virtual oscilloscope can accurately display the waveform with 20kHz sampling frequency, and achieve the desired targets.

    标签: 以太网 虚拟 波器设计

    上传时间: 2013-11-25

    上传用户:wbwyl

  • ZigBee无线传感网络的路由协议研究

     为满足无线网络技术具有低功耗、节点体积小、网络容量大、网络传输可靠等技术要求,设计了一种以MSP430单片机和CC2420射频收发器组成的无线传感节点。通过分析其节点组成,提出了ZigBee技术中的几种网络拓扑形式,并研究了ZigBee路由算法。针对不同的传输要求形式选用不同的网络拓扑形式可以尽大可能地减少系统成本。同时针对不同网络选用正确的ZigBee路由算法有效地减少了网络能量消耗,提高了系统的可靠性。应用试验表明,采用ZigBee方式通信可以提高传输速率且覆盖范围大,与传统的有线通信方式相比可以节约40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.

    标签: ZigBee 无线传感网络 协议研究 路由

    上传时间: 2013-10-09

    上传用户:robter

  • UHF读写器设计中的FM0解码技术

       针对UHF读写器设计中,在符合EPC Gen2标准的情况下,对标签返回的高速数据进行正确解码以达到正确读取标签的要求,提出了一种新的在ARM平台下采用边沿捕获统计定时器数判断数据的方法,并对FM0编码进行解码。与传统的使用定时器定时采样高低电平的FM0解码方法相比,该解码方法可以减少定时器定时误差累积的影响;可以将捕获定时器数中断与数据判断解码相对分隔开,使得中断对解码影响很小,实现捕获与解码的同步。通过实验表明,这种方法提高了解码的效率,在160 Kb/s的接收速度下,读取一张标签的时间约为30次/s。 Abstract:  Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator, the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level, the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding, so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding, at 160 Kb/s receiving speed, the time of the interrogator to read a tag is about 30 times/s.

    标签: UHF FM0 读写器 解码技术

    上传时间: 2013-11-10

    上传用户:liufei

  • LT5528 WCDMA ACPR和AltCPR测量

      ACPR (adjacent channel power ratio), AltCPR (alternatechannel power ratio), and noise are important performancemetrics for digital communication systems thatuse, for example, WCDMA (wideband code division multipleaccess) modulation. ACPR and AltCPR are bothmeasures of spectral regrowth. The power in the WCDMAcarrier is measured using a 5MHz measurement bandwidth;see Figure 1. In the case of ACPR, the total powerin a 3.84MHz bandwidth centered at 5MHz (the carrierspacing) away from the center of the outermost carrier ismeasured and compared to the carrier power. The resultis expressed in dBc. For AltCPR, the procedure is thesame, except we center the measurement 10MHz awayfrom the center of the outermost carrier.

    标签: AltCPR WCDMA 5528 ACPR

    上传时间: 2013-11-02

    上传用户:maricle

  • JDiff is a Javadoc doclet which generates an HTML report of all the packages, classes, constructors,

    JDiff is a Javadoc doclet which generates an HTML report of all the packages, classes, constructors, methods, and fields which have been removed, added or changed in any way, including their documentation, when two APIs are compared. This is very useful for describing exactly what has changed between two releases of a product. Only the API (Application Programming Interface) of each version is compared. It does not compare what the source code does when executed.

    标签: constructors generates packages Javadoc

    上传时间: 2015-09-06

    上传用户:lijianyu172

  • Verilog and VHDL状态机设计

    Verilog and VHDL状态机设计,英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler . Verilog and VHDL coding styles will be 2.0 Basic HDL coding presented. Different methodologies will be compared using real-world examples.

    标签: Verilog VHDL and 状态

    上传时间: 2013-12-19

    上传用户:change0329

  • The goal of this library is to make ODBC recordsets look just like an STL container. As a user, you

    The goal of this library is to make ODBC recordsets look just like an STL container. As a user, you can move through our containers using standard STL iterators and if you insert(), erase() or replace() records in our containers changes can be automatically committed to the database for you. The library s compliance with the STL iterator and container standards means you can plug our abstractions into a wide variety of STL algorithms for data storage, searching and manipulation. In addition, the C++ reflection mechanism used by our library to bind to database tables allows us to add generic indexing and lookup properties to our containers with no special code required from the end-user. Because our code takes full advantage of the template mechanism, it adds minimal overhead compared with using raw ODBC calls to access a database.

    标签: recordsets container library ODBC

    上传时间: 2015-10-11

    上传用户:xlcky

  • This my phd thesis for the WDM optical network optimization, which employs convex optimization techn

    This my phd thesis for the WDM optical network optimization, which employs convex optimization techniques to solve the proposed integer problems. The computation complexity of my optimization framework is very low compared with other existing method and a performance bound is provided at the same time.

    标签: optimization employs optical network

    上传时间: 2015-12-27

    上传用户:dongbaobao