ead file "YD.DOC". Who is the intended user Beginners in assembly and programmers. Features of the program: Yilmaz Disassembler:is an interactive disassembler which lets the user be a part of the disassembling process,is flexible, the user can disassemble in different formats,has user friendly interface, mouse support, pop-up menu commands, short cut key commands, context-sensitive on-line help,and it is cheap. Program s capacity and limitations: Max executable file size is 64 KB. Can not disassemble program of EXE-format.Only 8086/8088 CPU instructions can be disassembled. Disassemble 8087 Math Co-processor s instructions.
标签: programmers Beginners Features assembly
上传时间: 2014-06-21
上传用户:皇族传媒
dephi OBD II 技术路线,所谓OBD-II是一个系列的法规,目的是通过检测整个动力总成系统的故障或劣化来减少在用车的排放,排放控制系统是OBD-II的基础。OBD-II同时也提供诊断的标准化,修理及其他相关服务的标准化。当车辆的排放(HC,CO,NOx)由于被检测的零部件/系统的劣化而超出相关标准的1.5倍时,故障指示灯(MIL)必须被点亮以通知驾驶员,并同时记录故障码。
上传时间: 2016-07-03
上传用户:refent
此软件功能强大 It operates in the highly ompetitive UK banking sector against ...barcode reader to reduce human errors in the ordering process. - The ...co-generation and unit- testing of client and server components of the
标签: ompetitive operates banking against
上传时间: 2014-11-29
上传用户:huyiming139
Neural network match filter of chirp pulse compression Neural network match filter of chirp pulse compression
标签: network Neural filter match
上传时间: 2014-02-23
上传用户:ikemada
This a very simple baseband simulator for SC-FDMA system. This simulator is part of the upcoming book “Single Carrier FDMA: A New Air Interface for Long Term Evolution” (Wiley, Nov. 2008) which I co-authored with professor David J. Goodman at Polytechnic University. The purpose of this simulator is to give some concrete idea of how SC-FDMA system works. It does lack many realistic and sophisticated features such as channel coding, time-varying fading channel model, soft decision decoding, etc. Regardless, I am hoping that it will help you understand SC-FDMA which is a fairly new development in 3GPP LTE.
标签: simulator This baseband upcoming
上传时间: 2016-08-26
上传用户:小草123
In the previous article, we presented an approach for capturing similarity between words that was concerned with the syntactic similarity of two strings. Today we are back to discuss another approach that is more concerned with the meaning of words. Semantic similarity is a confidence score that reflects the semantic relation between the meanings of two sentences. It is difficult to gain a high accuracy score because the exact semantic meanings are completely understood only in a particular context.
标签: similarity presented capturing previous
上传时间: 2013-12-13
上传用户:wcl168881111111
A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
标签: simulation Verilog writing clock
上传时间: 2016-10-12
上传用户:王者A
A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.
标签: simulation Verilog writing results
上传时间: 2014-11-18
上传用户:ljt101007
Here are two newest published articles talking about joint source channel coding, in which source coding is invovled scalable video coding. They are very useful for people who are doing research about it.
标签: source published articles channel
上传时间: 2013-12-03
上传用户:1427796291
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
标签: bus bidirectional primarily designed
上传时间: 2013-12-11
上传用户:jeffery