Digital Clock in Assembly 我的一个大学满分VHDL作品,数字石英钟的模拟程序。
clock+jitter 技术资料
汇集 clock+jitter 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
There are many different (and often confusing) terms associated with clock-based devices. This application note attempts to clarif…
Clock+data serial protocol for PIC16/18F processors. Contains an example application for Zoom/Focus/
Clock+data serial protocol for PIC16/18F processors. Contains an example application for Zoom/Focus/Iris lens motor control. Writt…
Overview Input Clock = 24Mhz Preview VGA 15fps @ 60Hz VGA 12.5fps @ 50Hz Capture VGA 15fps @ 60Hz VGA 12.5fps @ 50Hz Output Format…
Java script fun. its well desigined clock please open it with Micro Soft Internet explorer
SX28 Assembler Source to generate 2 phase referenced frequencies. Simulate a bi-phase clock source.
Clock based on the VHDL design language, the revised time alarm can be set up
模拟计算机操作系统中改进的clock算法,源代码中用到了STL希望使用者在阅读之前有STL基础
ARM9硬件接口学习 CLOCK arm时钟设置与应用
用java写的GUI Analog Clock,用上了Observer,可以更改时间,对学习observer的运用很有帮助!