% Use this input file to excite function "ssj_req" clear all pt = 50.0e+3; % peak power in Watts g = 35.0; % antenna g…
antenna+design 源代码
汇集 antenna+design 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
% Use this input file to excite function "ssj_req" clear all pt = 50.0e+3; % peak power in Watts g = 35.0; % antenna g…
CM NEC-WIN Example CM Simple dipole antenna in Free Space CM Optimized for resonance at 300 MHz CE GW 1 9 0 -.2418 0 0 .2418 0 .05…
礦ision2 Build Log Project: D:\ZBH-DESIGN\51-Design\工作应用\呼答器\V3\发送端\DFQ.uv2 Project File Date: 03/03/2006 Output:
礦ision2 Build Log Project: D:\ZBH-DESIGN\51-Design\工作应用\呼答器\V3\接收端\DFQ.uv2 Project File Date: 03/02/2006 Output:
[ONE_PULSE_LCD] Implement Design=false
"Counter Design.obj" TO "Counter Design"
"Counter Design.obj" TO "Counter Design"
"Counter Design.obj" TO "Counter Design"
"Counter Design.obj" TO "Counter Design"