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addition-Wesley

  • 采用TÜV认证的FPGA开发功能安全系统

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 图Figure 1. Local Safety System

    标签: FPGA 安全系统

    上传时间: 2013-11-14

    上传用户:zoudejile

  • Create a 1-Wire Master with Xilinx PicoBlaze

    Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.

    标签: PicoBlaze Create Master Xilinx

    上传时间: 2013-11-12

    上传用户:大三三

  • hspice 2007下载 download

    解压密码:www.elecfans.com 随着微电子技术的迅速发展以及集成电路规模不断提高,对电路性能的设计 要求越来越严格,这势必对用于大规模集成电路设计的EDA 工具提出越来越高的 要求。自1972 年美国加利福尼亚大学柏克莱分校电机工程和计算机科学系开发 的用于集成电路性能分析的电路模拟程序SPICE(Simulation Program with IC Emphasis)诞生以来,为适应现代微电子工业的发展,各种用于集成电路设计的 电路模拟分析工具不断涌现。HSPICE 是Meta-Software 公司为集成电路设计中 的稳态分析,瞬态分析和频域分析等电路性能的模拟分析而开发的一个商业化通 用电路模拟程序,它在柏克莱的SPICE(1972 年推出),MicroSim公司的PSPICE (1984 年推出)以及其它电路分析软件的基础上,又加入了一些新的功能,经 过不断的改进,目前已被许多公司、大学和研究开发机构广泛应用。HSPICE 可 与许多主要的EDA 设计工具,诸如Candence,Workview 等兼容,能提供许多重要 的针对集成电路性能的电路仿真和设计结果。采用HSPICE 软件可以在直流到高 于100MHz 的微波频率范围内对电路作精确的仿真、分析和优化。在实际应用中, HSPICE能提供关键性的电路模拟和设计方案,并且应用HSPICE进行电路模拟时, 其电路规模仅取决于用户计算机的实际存储器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.

    标签: download hspice 2007

    上传时间: 2013-10-18

    上传用户:s363994250

  • 学习资料

    学习资料,关于C++的,Addison.Wesley写的Effective.&.More.Effective.C

    标签:

    上传时间: 2014-01-11

    上传用户:sjyy1001

  • 介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducin

    介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcontroller has 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to execute C code efficiently. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data RAM options and is available in 16 Kbytes and 8 Kbytes of on-chip ROM/OTPROM or ROMless options.

    标签: architecture introducin peripheral improves

    上传时间: 2015-03-15

    上传用户:ccclll

  • 本书是关于设计的

    本书是关于设计的,多年来我一直从事这项工作。基本上说,从我第一次试着阅 读《设计模式》(Gamma, Helm,Johnson & Vlissides, Addison-Wesley, 1995,通常 1 被称作“四人帮 (Gang of Four)”或者 GOF)这本书开始。

    标签:

    上传时间: 2013-12-12

    上传用户:luopoguixiong

  • c语言编译器

    c语言编译器,跨平台,4.2版本 lcc version 3.x is described in the book "A Retargetable C Compiler: Design and Implementation" (Addison-Wesley, 1995, ISBN 0-8053-1670-1). There are significant differences between 3.x and 4.x, most notably in the intermediate code. For details, see http://www.research.microsoft.com/~drh/pubs/interface4.pdf.

    标签: c语言 编译器

    上传时间: 2015-04-06

    上传用户:jkhjkh1982

  • c语言编译器

    c语言编译器,3.6版本 lcc version 3.x is described in the book "A Retargetable C Compiler: Design and Implementation" (Addison-Wesley, 1995, ISBN 0-8053-1670-1). There are significant differences between 3.x and 4.x, most notably in the intermediate code. For details, see http://www.research.microsoft.com/~drh/pubs/interface4.pdf.

    标签: c语言 编译器

    上传时间: 2015-04-06

    上传用户:小儒尼尼奥

  • VC技术内幕第五版_English.The 6.0 release of Visual C++ shows Microsoft s continued focus on Internet techno

    VC技术内幕第五版_English.The 6.0 release of Visual C++ shows Microsoft s continued focus on Internet technologies and COM, which are key components of the new Windows Distributed interNet Application Architecture (DNA). In addition to supporting these platform initiatives, Visual C++ 6.0 also adds an amazing number of productivity-boosting features such as Edit And Continue, IntelliSense, AutoComplete, and code tips. These features take Visual C++ to a new level. We have tried to make sure that this book keeps you up to speed on the latest technologies being introduced into Visual C++.

    标签: Microsoft continued Internet English

    上传时间: 2013-12-08

    上传用户:lepoke

  • avaSoft 目前正在准备这本书。这是一本教程

    avaSoft 目前正在准备这本书。这是一本教程,同时也是 JDBC 的重要参考手册,它将作为 Java 系列的组成部份在 1997 年春季由 Addison-Wesley 出版公司出版

    标签: avaSoft 教程

    上传时间: 2013-12-14

    上传用户:lizhen9880