搜索：XAPP
找到约 72 项符合「XAPP」的查询结果
结果 72
按分类筛选
https://www.eeworm.com/dl/kbcluoji/40070.html
可编程逻辑
XAPP105 - CPLD VHDL介绍
This introduction covers the fundamentals of VHDL as applied to Complex ProgrammableLogic Devices (CPLDs). Specifically included are those design practices that translate soundlyto CPLDs, permitting designers to use the best features of this powerful language to extractoptimum ...
https://www.eeworm.com/dl/850025.html
技术资料
xapp1052（PCIE讲解文档）
该文档为赛灵思官网上面找到的关于PCIE使用方面的讲解文档，是一份很不错的参考资料，可以下载来看看，，，，，，，，，，，，，，，，，，，，，，
https://www.eeworm.com/dl/fpga/doc/32580.html
教程资料
XAPP452-Spartan-3高级配置架构
This application note provides a detailed description of the Spartan™-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresente ...
https://www.eeworm.com/dl/kbcluoji/40052.html
可编程逻辑
XAPP452-Spartan-3高级配置架构
This application note provides a detailed description of the Spartan™-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresente ...
https://www.eeworm.com/dl/kbcluoji/40063.html
可编程逻辑
XAPP444 - CPLD配件,技巧和窍门
Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. Exactly why a design does not fit can sometimes b ...
https://www.eeworm.com/dl/kbcluoji/40067.html
可编程逻辑
XAPP144 -设计CPLD多电压系统
Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CP ...
https://www.eeworm.com/dl/663/198604.html
VHDL/FPGA/Verilog
XAPP299 version 1.0 reference design files
XAPP299 version 1.0 reference design files
https://www.eeworm.com/dl/kbcluoji/40065.html
可编程逻辑
XAPP440 - Xilinx CPLD的上电性能
Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospe ...
https://www.eeworm.com/dl/kbcluoji/40069.html
可编程逻辑
XAPP143-利用Verilog来创建CPLD设计
This Application Note covers the basics of how to use Verilog as applied to ComplexProgrammable Logic Devices. Various combinational logic circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are provided. Synchronous logiccircuit examples, such as ...