The PW2163D is a high frequency, synchronous, rectified, step-down, switch-mode converter withinternal powerMOSFETs. It offers a very compact solution to provide a 3A continuous current over awide input supply range,with excellent load and line regulation.The PW2163D requires a minimal number of readily available, external components and is availablein a spacesaving SOT23-6 package
标签： pw2163d
上传时间： 2022-02-11
上传用户：yiyewumian
The PW2163 is a high efficiency 500 kHz synchronous step-down DC-DC converter capable ofdelivering 3A current. The PW2163 operates over a wide input voltage range from 4.5V to 18V andintegrates main switch and synchronous switch with very low RDS(ON) to minimize the conductionloss. Low output voltage ripple and small external inductor and capacitor sizes are achieved with 500kHz switching frequency. It adopts the instant PWM architecture to achieve fast transient responsesfor high step down applications
标签： pw2163
上传时间： 2022-02-11
上传用户：yiyewumian
We would like to welcome you as a user of the Allegro CX, a rugged, handheld fi eld PC for data collection. Developed with the input of data collection professionals worldwide, the Allegro CX is adaptable and versatile for use in a wide variety of data collection environments. The Allegro CX continues to utilize our ergonomic, lightweight design that is standard in our line of Allegro Field PCs. This design makes your Allegro easy to use for extended periods while moving to and from data collection sites in the fi eld.
上传时间： 2014-12-23
上传用户：gaojiao1999
The MAX5713/MAX5714/MAX5715 4-channel, low-power,8-/10-/12-bit, voltage-output digital-to-analog converters(DACs) include output buffers and an internal referencethat is selectable to be 2.048V, 2.500V, or 4.096V. TheMAX5713/MAX5714/MAX5715 accept a wide supplyvoltage range of 2.7V to 5.5V with extremely low power(3mW) consumption to accommodate most low-voltageapplications. A precision external reference input allowsrail-to-rail operation and presents a 100kI (typ) load toan external reference.
上传时间： 2013-12-23
上传用户：ArmKing88
The purpose of this application note is to show an example of how a digital potentiometer can be used in thefeedback loop of a step-up DC-DC converter to provide calibration and/or adjustment of the output voltage.The example circuit uses a MAX5025 step-up DC-DC converter (capable of generating up to 36V,120mWmax) in conjunction with a DS1845, 256 position, NV digital potentiometer. For this example, the desiredoutput voltage is 32V, which is generated from an input supply of 5V. The output voltage can be adjusted in35mV increments (near 32V) and span a range wide enough to account for resistance, potentiometer and DCDCconverter tolerances (27.6V to 36.7V).
上传时间： 2014-12-23
上传用户：781354052
Automobile electronic systems place high demands ontoday’s DC/DC converters. They must be able to preciselyregulate an output voltage in the face of wide temperatureand input voltage ranges—including load dump transientsin excess of 60V and cold crank voltage drops to 4V. Theconverter must also be able to minimize battery drain inalways-on systems by maintaining high effi ciency over abroad load current range. Similar demands are made bymany 48V nonisolated telecom applications, 40V FireWireperipherals and battery-powered applications with autoplug adaptors. The LT3437’s best in classperformancemeets all of these requirements in a small thermallyenhanced 3mm × 3mm DFN package.
上传时间： 2013-10-15
上传用户：stampede
Battery powered applications that have a signifi cantamount of time in standby mode, require electrical circuitsto operate with a low quiescent current to preserve batterylife. The LTC3835 synchronous step-down controlleris an excellent solution with its ultralow quiescent current(80μA). Other features make it uniquely qualifi ed tosatisfy the needs of automotive applications. A wide 4Vto 36V input voltage range protects the supply againsthigh input voltage transients and is compatible with lowvoltage cold crank conditions. The constant frequencycurrent-mode architecture with high-side inductor current
上传时间： 2013-11-19
上传用户：stewart·
High voltage buck DC/DC controllers such as the LTC3890(dual output) and LTC3891 (single output) are popular inautomotive applications due to their extremely wide 4V to60V input voltage range, eliminating the need for a snubberand voltage suppression circuitry. These controllersare also well suited for 48V telecom applications whereno galvanic isolation is required.
上传时间： 2013-10-31
上传用户：wwwe
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上传时间： 2013-10-13
上传用户：ytulpx
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上传时间： 2013-10-23
上传用户：copu
