VERILOG
VerilogHDL是一种硬件描述语言，以文本形式来描述数字系统硬件的结构和行为的语言，用它可以表示逻辑电路图、逻辑表达式，还可以表示数字逻辑系统所完成的逻辑功能。VerilogHDL和VHDL是世界上最流行的两种硬件描述语言，都是在20世纪80年代中期开发出来的。前者由GatewayDesignA...
资源总数
500
VERILOG 热门资料
查看全部 500 份 →一个验证过的CAM源码（CAM=Content Address Memory）。语言为verilog
一个验证过的CAM源码（CAM=Content Address Memory）。语言为verilog
2013-12-12
142
system verilog This directory has all the examples in chapter 1. The examples are in different di
system verilog This directory has all the examples in chapter 1. The examples are in different directories. The table...
2017-03-05
132
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit...
2017-03-22
22