#!/bin/sh gcc -DVERJS=0 -o test test.c -I ../include -ljds -L /work/jetsic/lib -lz -lm -lcrypt -lpthread -ljdatapool -lmysqlclien…
Unix+make 源代码
汇集 Unix+make 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
verilog all.v alu_src1_sel.v alu_src2_sel.v alu_src3_sel.v alu.v decoder.v divide.v immediate_sel.v multiply.v op_select.v pc.v tb…
../../../bench/verilog/oc8051_tb.v ../../../bench/verilog/oc8051_xram.v ../../../bench/verilog/oc8051_uart_test.v ../../../bench/v…
$description = "The following test creates a makefile to test MAKE \n" ."(very generic)"; $details = "DETAILS"; op…
: run this script through /bin/sh M=/bin/make if [ -f /usr/bin/make ]; then M=/usr/bin/make fi exec $M TOPDIR=../../ -f ../..…
: run this script through /bin/sh exec /bin/make MODULE=tsap TOPDIR=../ -f ../config/CONFIG.make -f Makefile ${1+"$@"}
: run this script through /bin/sh exec /bin/make MODULE=acusap TOPDIR=../ -f ../config/CONFIG.make -f Makefile ${1+"$@"}
: run this script through /bin/sh M=/bin/make if [ -f /usr/bin/make ]; then M=/usr/bin/make fi exec $M TOPDIR=../../ -f ../..…
: run this script through /bin/sh exec /bin/make MODULE=pusap2 TOPDIR=../ -f ../config/CONFIG.make -f Makefile ${1+"$@"}
: run this script through /bin/sh exec /bin/make TOPDIR=../ -f ../config/CONFIG.make -f Makefile ${1+"$@"}