it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it...
Timer+A技术资料下载专区,收录500份相关技术文档、开发源码、电路图纸等优质工程师资源,全部免费下载。
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it...
Generate trellis data of a rate-1/n convolutional encoder.卷积码1/n的编码器,注意生成的是非系统码。
Java is the first language to provide a cross-platform I/O library that is powerful enough to handle all these diverse t...
This is a source of 13.560MHz RFID card reader for TRH031M as ATMEGA8-16AU MPU. The title is 3Alogics TRH031M 13.56MHz ...
A sample C program to demonstrate the usage of rtc() function in Linux to read the read time clock.
The attached zip includes a c code for initializing ILI9322 display chip used in many 3.5 TFT LCD devices. this is a SPI...
This is a PHP search engine. It searches for text and then displays results. At the time I completed it it was the fi...