搜索:Synthesizers

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https://www.eeworm.com/dl/962303.html 技术资料

Automated Calibration of Modulated Frequency Synthesizers.pdf

资料->【E】光盘论文->【E5】英文书籍->Automated Calibration of Modulated Frequency Synthesizers.pdf
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https://www.eeworm.com/dl/542/225426.html 其他书籍

CMOS PLL Synthesizers:analysis and design -- a very good book by Keliu Shu Edgar Sánchez-Sinencio a

CMOS PLL Synthesizers:analysis and design -- a very good book by Keliu Shu Edgar Sánchez-Sinencio and published by Springer.
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https://www.eeworm.com/dl/509/10614.html 行业应用文档

MC145170在基本HF和VHF振荡器中的应用电路

Phase–locked loop (PLL) frequency synthesizers are commonlyfound in communication gear today. Th
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https://www.eeworm.com/dl/902953.html 技术资料

MC145170在基本HF和VHF振荡器中的应用电路

Phase–locked loop (PLL) frequency synthesizers are commonlyfound in communication gear today. Th
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https://www.eeworm.com/dl/886803.html 技术资料

介绍CY2291三锁相环频率合成器的性能,内部结构,典型应用及配置要求格式

The CY2291, CY2292 and CY2295 are three-PLL frequency synthesizers that utilize EPROM technology. Ma
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https://www.eeworm.com/dl/923651.html 技术资料

介绍三锁相环时钟合成器

The CY2291, CY2292 and CY2295 are three-PLL frequency synthesizers that utilize EPROM technology. Ma
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https://www.eeworm.com/dl/663/481914.html VHDL/FPGA/Verilog

This short paper will give you some VHDL code examples that will help you design synchronous circuit

This short paper will give you some VHDL code examples that will help you design synchronous circuits that work first time.The philosophy behind Ten-Commandment code is that synthesizers are not to be trusted too much. Most of the code you will see is close to the structural leve ...
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https://www.eeworm.com/dl/678/283596.html 系统设计方案

Fast settling-time added to the already conflicting requirements of narrow channel spacing and low

Fast settling-time added to the already conflicting requirements of narrow channel spacing and low phase noise lead to Fractional4 divider techniques for PLL synthesizers. We analyze discrete "beat-note spurious levels from arbitrary modulus divide sequences including those from ...
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https://www.eeworm.com/dl/527/228952.html 通讯/手机编程

Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range

Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in ...
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