Synthesis
共 117 篇文章
Synthesis 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 117 篇文章，持续更新中。
关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture
是一本好书,verilog HDL,a guide to digital design and synthesis
是一本好书,verilog HDL,a guide to digital design and synthesis
32bits FIFO with synchronizer. pass the synthesis using Synopsys tools
32bits FIFO with synchronizer. pass the synthesis using Synopsys tools
-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93
FPGA Synthesis with the Synplify Pro Tool
FPGA Synthesis with the Synplify Pro Tool
VIP专区-嵌入式/单片机编程源码精选合集系列（112）
<b>VIP专区-嵌入式/单片机编程源码精选合集系列（112）</b><font color="red">资源包含以下内容：</font><br/>1. 总结了常用的主要c算法.<br/>2. 太阳能热水器智能控制,它以89C52单片机为核心.<br/>3. 本系统由单片机系统、矩阵键盘、LED显示和报警系统组成。系统能完成开锁、超时报警、超次锁定、管理员解密、修改用户密码基本的密码锁的功能。除上
VIP专区-嵌入式/单片机编程源码精选合集系列（95）
<b>VIP专区-嵌入式/单片机编程源码精选合集系列（95）</b><font color="red">资源包含以下内容：</font><br/>1. Embedded Systems Building Blocks(E)
uC/OS-II的好书.<br/>2. zigbee的说明文档!看起来很方便!希望对大家有帮助!.<br/>3. PCI总线配置说明,希望给PCI驱动开发的朋友一些帮助..<
Guide to HDL Coding Styles for Synthesis
<p>
<span style="color: rgb(68, 68, 68); font-family: Simsun; background-color: rgb(241, 242, 245); ">这篇文章讨论了不同HDL代码的编写方式，对综合结果的影响。阅读本文对深入了解综合工具和提高HDL的编写水平有不少帮助，原文时针对Synopsys的综合软件论述的，但对所有综合软件，都有普遍的借鉴
The VHDL Golden Reference Guide is a compact quick reference guide to the VHDL language, its syntax,
The VHDL Golden Reference Guide is a compact quick reference guide to the VHDL language, its syntax, semantics, synthesis and application to hardware design.
FPGA_Synthesis_with_the_Synplify_Pro_Tool
FPGA Synthesis with the Synplify_Pro Tool
DDR SDRAM控制器的VHDL源代码
DDR SDRAM控制器的VHDL源代码，含详细设计文档。
The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDR
FreeTTS is a speech synthesis system written entirely in the Java programming language. It is based
FreeTTS is a speech synthesis system written entirely in the Java
programming language. It is based upon Flite, a small, fast, run-time speech
synthesis engine, which in turn is based upon Universit
Design Simulation and synthesis of a fft processor using VHDL
Design Simulation and synthesis of a fft processor using VHDL
Demonstrates 1-D FDTD initial state formation. Please edit the FLAGS for demonstration of different
Demonstrates 1-D FDTD initial state formation. Please edit the FLAGS for demonstration of different cases. BASED ON "1-D Digital Waveguide Modeling for Improved Sound Synthesis".
coding_and_synthesis_with_verilog great example of verilog
coding_and_synthesis_with_verilog
great example of verilog
A Guide To Digital Design And Synthesis
A Guide To Digital Design And Synthesis
The xapp851.zip archive includes the following subdirectories. The specific contents of each subdi
The xapp851.zip archive includes the following subdirectories. The specific
contents of each subdirectory below:
\rtl - HDL design files
\sim - simulation files
\synth - Synthesis relat
Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardw
Often it is necessary to add some logical control to a MATLAB algorithm to allow the generated hardware to function correctly in the overall system. This lab exercise will explore how hardware control
With the advent of multimedia, digital signal processing (DSP) of sound has emerged from the shadow
With the advent of multimedia, digital signal processing (DSP) of sound has emerged from the shadow of bandwidth-limited speech processing. Today, the main appli- cations of audio DSP are high quality
-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHD