搜索:Speeds
找到约 25 项符合「Speeds」的查询结果
结果 25
按分类筛选
https://www.eeworm.com/dl/618/466038.html
驱动编程
controller for sending serial data at different speeds
controller for sending serial data at different speeds
https://www.eeworm.com/dl/618/466036.html
驱动编程
controller RS232 for receiving serial data at different speeds
controller RS232 for receiving serial data at different speeds
https://www.eeworm.com/dl/620/105161.html
Internet/网络编程
Boosts Browsing Speeds Up To 3,000 Times Faster.zip
Boosts Browsing Speeds Up To 3,000 Times Faster.zip
https://www.eeworm.com/dl/663/418801.html
VHDL/FPGA/Verilog
Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every cycle, sp
Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every cycle, speed grows. The process starts again after last 8 cycle.
https://www.eeworm.com/dl/914270.html
技术资料
Transmission lines and terminations with Philips Advanced Logic families
With increasing systems speeds and faster logic families,interconnect characteristics have becom
https://www.eeworm.com/dl/918920.html
技术资料
通过智能电源管理提高系统性能.pdf
As the processor speeds have increased in the last few years, so has the speed or bandwidth of the d
https://www.eeworm.com/dl/930681.html
技术资料
过智能电源管理提高系统性能
As the processor speeds have increased in the last few years, so has the speed or bandwidth of th
https://www.eeworm.com/dl/692/206744.html
行业发展研究
This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs t
This paper presents several low-latency mixed-timing
FIFO (first-in–first-out) interfaces designs that interface systems
on a chip working at different speeds. The connected systems
can be either synchronous or asynchronous. The designs are then
adapted to work between systems w ...
https://www.eeworm.com/dl/949571.html
技术资料
Sd_sig.vsd
Sd_sig.vsd
Introduction
Synchronous DRAMs have become the memory standard in many designs. They provide substantial advances in
DRAM performance. They synchronously burst data at clock speeds presently up to 143MHz. They also provide
hidden precharge time and the ability to rando ...
https://www.eeworm.com/dl/949583.html
技术资料
Sd_cnfg.vsd
Sd_cnfg.vsd
Introduction
Synchronous DRAMs have become the memory standard in many designs. They provide substantial advances in
DRAM performance. They synchronously burst data at clock speeds presently up to 143MHz. They also provide
hidden precharge time and the ability to rand ...