This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL board) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上传时间： 2013-11-11
上传用户：gundamwzc
用途：测量地磁方向，测量物体静止时候的方向，测量传感器周围磁力线的方向。注意，测量地磁时候容易受到周围磁场影响，主芯片HMC5883 三轴磁阻传感器特点（抄自网上）： 1，数字量输出：I2C 数字量输出接口，设计使用非常方便。 2，尺寸小: 3x3x0.9mm LCC 封装，适合大规模量产使用。 3，精度高：1－2 度，内置12 位A/D,OFFSET, SET/RESET 电路，不会出现磁饱和现象，不会有累加误差。 4，支持自动校准程序，简化使用步骤，终端产品使用非常方便。 5，内置自测试电路，方便量产测试，无需增加额外昂贵的测试设备。 6，功耗低：供电电压1.8V, 功耗睡眠模式-2.5uA 测量模式-0.6mA 连接方法： 只要连接VCC，GND，SDA，SDL 四条线。 Arduino GND -> HMC5883L GND Arduino 3.3V -> HMC5883L VCC Arduino A4 (SDA) -> HMC5883L SDA Arduino A5 (SCL) -> HMC5883L SCL (注意，接线是A4，A5，不是D4,D5) 源程序： #include <Wire.h> #include <HMC5883L.h> HMC5883Lcompass; voidsetup() { Serial.begin(9600); Wire.begin(); compass = HMC5883L(); compass.SetScale(1.3); compass.SetMeasurementMode(Measurement_Continuous); } voidloop() { MagnetometerRaw raw = compass.ReadRawAxis(); MagnetometerScaled scaled = compass.ReadScaledAxis(); float xHeading = atan2(scaled.YAxis, scaled.XAxis); float yHeading = atan2(scaled.ZAxis, scaled.XAxis); float zHeading = atan2(scaled.ZAxis, scaled.YAxis); if(xHeading < 0) xHeading += 2*PI; if(xHeading > 2*PI) xHeading -= 2*PI; if(yHeading < 0) yHeading += 2*PI; if(yHeading > 2*PI) yHeading -= 2*PI; if(zHeading < 0) zHeading += 2*PI; if(zHeading > 2*PI) zHeading -= 2*PI; float xDegrees = xHeading * 180/M_PI; float yDegrees = yHeading * 180/M_PI; float zDegrees = zHeading * 180/M_PI; Serial.print(xDegrees); Serial.print(","); Serial.print(yDegrees); Serial.print(","); Serial.print(zDegrees); Serial.println(";"); delay(100); }
上传时间： 2013-12-16
上传用户：stella2015
使用Nios II软件构建工具 This chapter describes the Nios® II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, and archivable process for creating your software product. You can invoke the Nios II SBT through either of the following user interfaces: ■ The Eclipse™ GUI ■ The Nios II Command Shell The purpose of this chapter is to make you familiar with the internal functionality of the Nios II SBT, independent of the user interface employed.
上传时间： 2013-10-12
上传用户：china97wan
面向Eclips的Nios II软件构建工具手册 The Nios® II Software Build Tools (SBT) for Eclipse™ is a set of plugins based on the Eclipse™ framework and the Eclipse C/C++ development toolkit (CDT) plugins. The Nios II SBT for Eclipse provides a consistent development platform that works for all Nios II embedded processor systems. You can accomplish all Nios II software development tasks within Eclipse, including creating, editing, building, running, debugging, and profiling programs.
上传时间： 2013-11-02
上传用户：瓦力瓦力hong
Nios II定制指令用户指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II arithmetic logic unit (ALU) as shown in Figure 1–1.
上传时间： 2013-10-12
上传用户：kang1923
Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. Exactly why a design does not fit can sometimes bedifficult to determine. Programmable logic devices can be configured in almost an infinitenumber of ways. The same design may fit when you use certain implementation switches, andfail to fit when using other switches. This application note attempts to clarify the CPLD softwareimplementation (CPLDFit) options, as well as discuss implementation tips in CoolRunnerTM-IIdesigns in order to maximize CPLD utilization.
上传时间： 2014-01-11
上传用户：a471778
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上传时间： 2013-11-23
上传用户：shen_dafa
反复提示需要重新启动：在”运行“，输入”Regedit“打开注册表， 出如下的注册表键值”HKEY_LOCAL_MACHINE\SYSTEM\CurrentControl Set\Control\Session Manager\PendingFileRenameOperations” 显示出错消息1645”安装Microsoft Net Framework”时出错，返回代码1601，安装被取消：用户的操作系统DCOM组态出错。在“运行”中，输入“dcomcnfg.exe”回车。在弹出的DCOM组态属性设置对话框的”标准属性“选项卡中，不要同时选择”缺省验证级别“＝”无”和“缺省身份更改级别‘＝”隐名’。
上传时间： 2013-11-22
上传用户：myworkpost
三菱FX-PLC 的通讯协议参考(含有源码):三菱FX 系列PLC 专用协议通信指令一览FX 系列PLC 专用协议通信指令一览以下将详细列出PLC 专用协议通信的指令指令 注释BR 以1 点为单位，读出位元件的状态WR 以16 点为单位，读出位元件的状态，或以1 字为单位读出字元件的值BW 以1 点为单位，写入位元件的状态WW 以16 点为单位，写入位元件的状态或以1 字为单位写入值到字元件BT 以1 点为单位，SET/RESET 位元件WT 以16 点为单位，SET/RESET 位元件，或写入值到字元件RR 控制PLC 运行RUNRS 控制PLC 停止STOPPC 读出PLC 设备类型TT 连接测试注：位元件包括X,Y,M,S 以及T,C 的线圈等字元件包括D,T,C,KnX,KnY,KnM 等。
上传时间： 2015-01-02
上传用户：gdgzhym
Accurate measurement of the third order intercept pointfor low distortion IC products such as the LT5514 requirescertain precautions to be observed in the test setup andtesting procedure. The LT5514 linearity performance ishigh enough to push the test equipment and test set-up totheir limits. A method for accurate measurement of thirdorder intermodulation products, IM3, with standard testequipment is outlined below.It is also important to correctly interpret the LT5514specification with respect to ROUT, and the impact ofdemo-board transmission-line termination loss whenevaluating the linearity performance, as explained in theLT5514 Datasheet and in Note 1 of this document.
上传时间： 2013-11-14
上传用户：l254587896
