#!/bin/sh /usr/bin/rm -rf ADMS_LIB *.ini valib ADMS_LIB vacom ../src/*.vhd vacom ../tb/bench.vhd vasim -cmd bench.cmd -do bench…
Run+Level 源代码
汇集 Run+Level 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
#!/bin/sh /usr/bin/rm -rf ADMS_LIB *.ini valib ADMS_LIB vacom ../src/resistor.vhd vacom ../src/capacitor.vhd vacom ../src/step.vh…
#!/bin/sh /usr/bin/rm -rf ADMS_LIB *.ini valib ADMS_LIB vacom ../src/divider_ent.vhd vacom ../src/divider_simple.vhd vacom ../tb/…
#!/bin/sh /usr/bin/rm -rf ADMS_LIB *.ini valib ADMS_LIB vacom ../../section6.3.5_lowpass/src/lowpass.vhd vacom ../tb/bench.vhd …
#!/bin/sh /usr/bin/rm -rf ADMS_LIB *.ini valib ADMS_LIB vacom ../src/*.vhd vacom ../tb/bench.vhd vasim -cmd bench.cmd -do bench.…
#!/bin/csh ncverilog \ +define+TEST_BENCH \ \ ../verilog/core/alu.v \ ../verilog/core/presclr_wdt.v \…
#! /bin/csh -f cp lj.model fort.25 foreach npart (2000 ) foreach rho (0.7 ) echo "---equilibration step" echo " --- rho …
#!/bin/csh -xf gcc -lm main_rs.c ; ./a.out > log
#!/bin/csh -f # on Error exit this cshell # test randomly gcc -lm main_burst.c @ n = 1 while ( $n log grep frame_enc log set …
#!/bin/csh foreach step ( 1 2 3 4 5 6 7 8 9 10 ) tetr < inp_for_script > out mv POSCAR.1 POSCAR vasp mv OUTCAR OUTCA…