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  • MT9P001-5100-Rev-F图像传感器手册

    MT9P001-5100-Rev-F图像传感器手册

    标签: 图像传感器

    上传时间: 2022-06-12

    上传用户:d1997wayne

  • LPC1788用户手册LPC178X_7X_Rev3

    LPC178* 177*用户手册 LPC178x/7x 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 96 kB SRAM; USB Device/Host/OTG; Ethernet; LCD; EMC Rev. 3 — 27 December 2011 Objective data sheet

    标签: LPC X_Rev 1788 178

    上传时间: 2013-04-24

    上传用户:胡佳明胡佳明

  • MSP430FR57xx Family User手册

    MSP430FR57xx Family User's Guide (Rev. A)

    标签: Family User MSP 430

    上传时间: 2013-11-15

    上传用户:ainimao

  • MSP430F13x14x14x1 Device Erratasheet (Rev. B)

    msp430单片机

    标签: Erratasheet 14x x14 Device

    上传时间: 2013-10-18

    上传用户:dick_sh

  • MSP430x13x, MSP430x14x, MSP430x14x1 Mixed Signal Microcontroller (Rev. F)

    TI公司低功耗单片机MSP430系列。

    标签: MSP 430 Microcontroller Signal

    上传时间: 2013-11-23

    上传用户:非衣2016

  • XAPP740利用AXI互联设计高性能视频系统

    This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board

    标签: XAPP 740 AXI 互联

    上传时间: 2013-11-14

    上传用户:fdmpy

  • 数据分析仪说明书

    User ManualRev. 1.2SmartRF® CC2420DK: Packet Sniffer for IEEE 802.15.4 and ZigBee Table of contents1 INTRODUCTION...............................................................................................31.1 HARDWARE PLATFORM.......................................................................................31.2 SOFTWARE.........................................................................................................32 USER INTERFACE..........................................................................................42.1 MENUS AND TOOLBARS.......................................................................................62.2 SETUP................................................................................................................62.3 SELECT FIELDS...................................................................................................72.3.1 Tips............................................................................................................72.4 PACKET DETAILS.................................................................................................72.5 ADDRESS BOOK..................................................................................................92.5.1 Tips............................................................................................................92.6 DISPLAY FILTER................................................................................................102.7 TIME LINE.........................................................................................................103 HELP....................................................................................................................114 TROUBLESHOOTING..................................................................................125 GENERAL INFORMATION........................................................................135.1 DOCUMENT HISTORY........................................................................................135.2 DISCLAIMER......................................................................................................135.3 TRADEMARKS...................................................................................................136 ADDRESS INFORMATION........................................................................14

    标签: 数据 分析仪 说明书

    上传时间: 2014-01-14

    上传用户:zhangyi99104144

  • 71M6541演示板用户手册

    The Maxim Integrated 71M6541-DB Rev 3.0 Demo Board is a demonstration board for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo Board allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and overall system use.

    标签: 71M6541 演示板 用户手册

    上传时间: 2013-11-06

    上传用户:雨出惊人love

  • arm7tdmi介绍

    介绍这一章介绍ARMTDMI-S 处理器包含以下小节􀁺􀀃 关于ARM7TDMI-S 处理器􀁺􀀃 ARM7TDMI-S 结构􀁺􀀃 ARM7TDMI-S 模块内核和功能框图􀁺􀀃 ARM7TDMI-S 指令集汇总􀁺􀀃 Rev 3a 和Rev 4 之间的差异1.1 关于ARM7TDMI-S 处理器ARM7TDMI-S 处理器是ARM 通用32 位微处理器家族的成员之一ARM 处理器具有优异的性能但功耗却很低使用门的数量也很少ARM 结构是基于精简指令集计算机(RISC)原理而设计的指令集和相关的译码机制比复杂指令集计算机要简单得多这样的简化实现了􀁺􀀃 高的指令吞吐量􀁺􀀃 出色的实时中断响应􀁺􀀃 小的高性价比的处理器宏单元

    标签: arm7tdmi

    上传时间: 2014-12-30

    上传用户:xiaowei314

  • EVDO基本原理和关键技术

      §培训目标:   本课程主要对EVDO的基本原理和关键技术进行介绍。通过本课程的学习,可以了解EVDO Rev.0和Rev.A的空中接口和关键技术,以及1X/DO互操作的相关规则等。   §培训内容:   EVDO技术发展、网络结构简介;   EVDO Rev.0和RevA的空中接口结构;   EVDO Rev.0和RevA的关键技术;   1X / DO互操作原则;

    标签: EVDO 关键技术

    上传时间: 2014-03-25

    上传用户:d815185728